AK4397 Datasheet, PDF (32/37 Pages) Asahi Kasei Microsystems – High Performance Premium 32-Bit DAC

Digital Ground
System
Controller
Analog Ground
1 DVDD
2 PDN
3 BICK
4 SDATA
5 LRCK
6 CSN
7 CAD0
8 CCLK
9 CDTI
10 DFS0
11 DIF1
[AK4397]
AOUTLN 33
VSS2 32
VDDL 31
VREFHL 30
VREFLL 29
NC
28
VREFLR 27
VREFHR 26
VDDR 25
VSS1 24
AOUTRN 23
Figure 16. Ground Layout
1. Grounding and Power Supply Decoupling
To minimize coupling by digital noise, decoupling capacitors should be connected to AVDD, VDDL/R and DVDD,
respectively. AVDD, VDDL/R is supplied from analog supply in system and DVDD is supplied from digital supply in
system. Power lines of AVDD, VDDL/R and DVDD should be distributed separately from the point with low impedance
of regulator etc. The power up sequence between AVDD, VDDL/R and DVDD is not critical. VSS1-4 must be
connected to the same analog ground plane. Decoupling capacitors for high frequency should be placed as near
as possible.
2. Voltage Reference
The differential Voltage between VREFHL/R and VREFLL/R set the analog output range. VREFHL/R pin is normally
connected to AVDD and VREFLL/R pin is normally connected to VSS. VREFHL/R and VREFLL/R should be
connected with a 0.1µF ceramic capacitor. VCOM is a signal ground of this chip. An electrolytic capacitor 10µF parallel
with a 0.1µF ceramic capacitor attached between VCOM and VSS eliminates the effects of high frequency noise. No load
current may be drawn from VCOM pin. All signals, especially clocks, should be kept away from the VREFHL/R,
VREFLL/R and VCOM pins in order to avoid unwanted coupling into the AK4397.
3. Analog Outputs
The analog outputs are full differential outputs and 2.8Vpp (typ, VREFHL/R − VREFLL/R = 5V) centered around
VCOM. The differential outputs are summed externally, V_AOUT = (AOUT+) − (AOUT−) between AOUT+ and AOUT−.
If the summing gain is 1, the output range is 5.6Vpp (typ, VREFHL/R − VREFLL/R = 5V). The bias voltage of the
external summing circuit is supplied externally. The input data format is 2's complement. The output voltage (V_AOUT) is a
positive full scale for 7FFFFFH (@24bit) and a negative full scale for 800000H (@24bit). The ideal V_AOUT is 0V for
000000H(@24bit).
The internal switched-capacitor filters attenuate the noise generated by the delta-sigma modulator beyond the audio
passband. Figure 17 shows an example of external LPF circuit summing the differential outputs by an op-amp.
Figure 18 shows an example of differential outputs and LPF circuit example by three op-amps.
MS0616-E-00
- 32 -
2007/05