AK4397 Datasheet, PDF (31/37 Pages) Asahi Kasei Microsystems – High Performance Premium 32-Bit DAC

[AK4397]
SYSTEM DESIGN
Figure 15 show the system connection diagram. Figure 17, Figure 18 and Figure 19 show the analog output circuit
examples. An evaluation board (AKD4397) is available which demonstrates the optimum layout, power supply
arrangements and measurement results.
Analog5.0V
Digital 5.0V
10u
++
0.1u
10u
+
Reset & PD
64fs
Audio Data
fs
Micro-
Controller
0.1u
1 DVDD
2 PDN
3 BICK
4 SDATA
5 LRCK
6 CSN
7 CAD0
8 CCLK
9 CDTI
10 DIF0
11 DIF1
Top View
Lch
Lch
LPF Mute
Lch Out
AOUTLN 33
VSS2 32
VDDL 31
VREFHL 30
VREFLL 29
NC 28
VREFLR 27
VREFHR 26
VDDR 25
VSS1 24
AOUTRN 23
0.1u
0.1u
0.1u
0.1u
10u
+
+
10u
10u
+
+
10u
Rch
Rch
LPF
Mute _{Rch Out}
+ _{Electrolytic Capacitor}
Ceramic Capacitor
Notes:
- Chip Address = “00”. LRCK = fs, BICK = 64fs.
- Power lines of AVDD and DVDD should be distributed separately from the point with low impedance of regulator
etc.
- VSS1-4 must be connected to the same analog ground plane.
- When AOUT drives some capacitive load, some resistor should be added in series between AOUT and
capacitive load.
- All input pins except pull-down/pull-up pins should not be left floating.
Figure 15. Typical Connection Diagram (AVDD=VDDL/R=5V, DVDD=5V, Serial mode)
MS0616-E-00
- 31 -
2007/05