AK4627 Datasheet, PDF (31/46 Pages) Asahi Kasei Microsystems – High Performance Multi-channel Audio CODEC

[AK4627]
■ Serial Control Interface
The AK4627’s functions are controlled through registers. The registers may be written by two types of control modes.
The chip address is determined by the state of the CAD0 and CAD1 inputs. The PDN pin = “L” initializes the registers to
their default values. Writing “0” to the RSTN bit can initialize the internal timing circuit but the register data will not be
initialized. When the PS pin state is changed, the AK4627 should be reset by the PDN pin.
* Writing to control register is invalid when the PDN pin = “L”.
(1) 3-wire Serial Control Mode (I2C pin= “L”)
Internal registers may be written through the 3 wire µP interface pins (CSN, CCLK and CDTI). The data on this
interface consists of Chip address (2bits, CAD0/1), Read/Write (1bit, Fixed to “1”, Write only), Register address
(MSB first, 5bits) and Control data (MSB first, 8bits). Address and data is clocked in on the rising edge of CCLK
and data is clocked out on the falling edge. For write operations, data is latched after a low-to-high transition of
CSN. The clock speed of CCLK is 5MHz(max).
* The AK4627 does not support read commands in 3wire serial control mode.
CSN
CCLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
CDTI
C1 C0 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
C1-C0: Chip Address (C1=CAD1, C0=CAD0)
R/W: Read/Write (Fixed to “1”, Write only)
A4-A0: Register Address
D7-D0: Control Data
Figure 21. 3-wire Serial Control I/F Timing
MS1278-E-02
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2012/03