AME9002 Datasheet, PDF (3/37 Pages) Asahi Kasei Microsystems – CCFL Backlight Controller

AME, Inc.
AME9002
Preliminary
CCFL Backlight Controller
n Pin Description
Pin #
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Pin Name
Pin Description
CSDET
Current sense detect. Connect this pin to the CCFL current sense resistor divider.
During the initial startup period this pin senses that the CCFL has struck when
V(CSDET) > 1.25 volts. If, after the initial s tart up period, this pin is below 1.25V for 4
cons ecutive clock cycles after SSC > 3V then the circuit will shutdown.
BATTFB
OUTC
UVLO feedback pin. If this pin is above 1.5V then the OUTA pin is allowed to switch, if
below 1.25V then OUTA is dis abled.
Drives one of the external NFETs, opposite phase of OUTAPB.
OUTAPB
Drives one of the external NFETs, opposite phase of OUTC.
OUTA
Drives the high side PFET.
VBATT
Battery input. This is the pos itive supply for the OUTA driver.
BRPOL
VDD
Brightnes s polarity control. When this pin is low the CCFL brightnes s increas es as
the voltage at the BRIGHT pin increases. When this pin is high the CCFL brightness
decreases as the voltage at the BRIGHT pin increases.
Regulated 5V supply input.
CT1
Sets the dim ming cycle frequency. Usually about 100Hz.
FB
Negative input of the voltage control loop error amplifier.
COMP
Output of the voltage control loop error amplifier.
BRIGHT
SSV
PNP
Brightnes s control input. A DC voltage on this controls the duty cycle of the dimm ing
cycle. This pin is com pared to a 3V ramp at the CT1 pin.
Soft start ram p for the voltage control loop. (20uA source current.) The voltage at SSV
clam ps the voltage at COMP to be no greater than SSV thereby lim iting the increas e of
the s witching duty cycle.
Drives the bas e of an external PNP transis tor used for the 5V LDO.
3