AKD4552-A Datasheet, PDF (3/33 Pages) Asahi Kasei Microsystems – 24bit A/D and D/A converter,

ASAHI KASEI
[AKD4552-A]
(1) Evaluation of A/D using DIT (Optical Link)
PORT2 (DIT) and X2 (X’tal) is used. DIT generates audio bi-phase signal from received data and which is
output through optical connector (TOTX176). It is possible to connect AKM’s D/A converter evaluation boards
on the digital-amplifier which equips DIR input. Nothing should be connected to PORT1 (DIR), PORT3
(ROM). In case of using external clock through a BNC connector (J5), select EXT on JP11 (CLK) and short JP8
(XTE) and open JP13 (EXT). AK4112B should be powered down.
JP3
LRCK
JP4
BCLK
JP6
SDTI
JP8
JP13
XTE
EXT
ADC DIR ADC DIR ADC DIR
• Clock example
1-1) Normal speed of ADC (MCLK=256fs)
Master clock frequency example of X2 : X2 = 8.192MHz, 11.2896MHz, 12.288MHz
JP2
MCKO
M1 M2
JP7
SPEED
X4
X2
X1
JP9
MCLK
X1
X2
JP10
BCFS
X1
X4
JP11
CLK
JP12
LRFS
DIR
EXT X1
X4
XTL
1-2) Normal speed of ADC (MCLK=512fs)
Master clock frequency example of X2 : X2 = 16.384MHz, 22.5792MHz, 24.576MHz
JP2
MCKO
M1 M2
JP7
SPEED
X4
X2
X1
JP9
MCLK
X1
X2
JP10
BCFS
X1
X4
JP11
CLK
JP12
LRFS
DIR
EXT X1
X4
XTL
1-3) Double speed of ADC (MCLK=256fs)
Master clock frequency example of X2 : X2 = 16.384MHz, 22.5792MHz, 24.576MHz
JP2
MCKO
M1 M2
JP7
SPEED
X4
X2
X1
JP9
MCLK
X1
X2
JP10
BCFS
X1
X4
JP11
CLK
JP12
LRFS
DIR
EXT X1
X4
XTL
<KM080600>
-3-
2005/10