AK4566 Datasheet, PDF (28/45 Pages) Asahi Kasei Microsystems – 20bit Stereo CODEC with built-in IPGA & HP-AMP

ASAHI KASEI
AKM CONFIDENTIAL
[AK4566]
n Register Definitions
Addr Register Name
00H Power Management
Default
D7
HPRMT
0
D6
HPLMT
0
D5
PMMO
0
D4
PMHPR
0
D3
PMHPL
0
D2
D1
PMDAC PMADC
0
0
D0
PMVCM
0
PMVCM: Power Management for VCOM Block
0: Power OFF (Default)
1: Power ON
PMADC: Power Management for IPGA and ADC Blocks
0: Power OFF (Default)
1: Power ON
MCLK should be present when PMADC bit= “1”.
PMDAC: Power Management for DAC Blocks
0: Power OFF (Default)
1: Power ON
When PMDAC bit is changed from “0” to “1”, DAC is powered-up to the current register values (ATT
value, sampling rate, etc).
PMHPL: Power Management for Lch of Headphone Amp
0: Power OFF (Default). HPL pin becomes HVSS(0V).
1: Power ON
PMHPR: Power Management for Rch of Headphone Amp
0: Power OFF (Default). HPR pin becomes HVSS(0V).
1: Power ON
PMMO: Power Management for Mono Output
0: Power OFF (Default) MOUT pin becomes Hi-Z.
1: Power ON
HPLMT: Mute for Lch of Headphone Amp
0: Normal operation (Default). MUTET pin is connected to VCOM pin internally.
1: Mute. MUTET pin is connected to HPL pin internally.
HPLMT: Mute for Rch of Headphone Amp
0: Normal operation (Default). MUTET pin is connected to VCOM pin internally.
1: Mute. MUTET pin is connected to HPR pin internally.
HPLMT HPRMT
MUTET
0
0
Connected to VCOM
0
1
Connected to HPR
1
0
Connected to HPL
1
1
Connected to HPL,HPR
Table 5. MUTET internal connection
All blocks can be powered-down by setting PDN pin to “L” regardless of register values setup. All blocks can be also
powered-down by setting all power management bits to “0”. In this case, control register values are held.
REV 0.5
- 28 -
2002/2