AK4566 Datasheet, PDF (17/45 Pages) Asahi Kasei Microsystems – 20bit Stereo CODEC with built-in IPGA & HP-AMP

ASAHI KASEI
AKM CONFIDENTIAL
[AK4566]
n ALC Operation
[1] ALC Limiter Operation
During the ALC limiter operation, when either output level of Lch or Rch in IPGA exceeds ALC limiter detection level set
by LMTH bit, IPGA value is automatically attenuated by ALC limiter ATT step set by LMAT1-0 bits. Then the IPGA
value is changed commonly for Lch and Rch.
At ZELMN bit = “1”, timeout period is set by LTM1-0 bits. The operation for attenuation is done continuously until the
IPGA output signal level becomes LMTH or less. After finishing the operation for attenuation, unless ALC bit is changed
to “0”, the operation of attenuation repeats when the IPGA output signal level exceeds LMTH.
At ZELMN bit = “0”, timeout period is set by ZTM1-0 bits. The IPGA value is automatically attenuated with zero crossing
detection.
The ALC operation of the AK4566 corresponds to the impulse noise. If the impulse noise is supplied at ZELMN = “0”, the
ALC limiter operation becomes the faster period than a set of ZTM1-0 bits. In case of ZELMN = “1”, it becomes the same
period as LTM1-0 bits.
[2] ALC Recovery Operation
The ALC recovery operation waits until a time set by WTM1-0 bits after completing the ALC limiter operation. If the
output signal does not exceed recovery waiting counter reset level set by LMTH bit, the ALC recovery operation is done.
The IPGA value automatically increases by this operation up to the reference level set by REF6-0 bits with zero crossing
detection which timeout period is set by ZTM1-0 bits. Then the IPGA value is set for Lch and Rch commonly. The ALC
recovery operation is done at a period set by WTM1-0 bits. When zero cross is detected at the IPGA output during the wait
period set by WTM1-0 bits, the ALC recovery operation waits until WTM1-0 period and the next recovery operation is
done.
During the ALC recovery operation or the recovery waiting, when either output signal level of Lch or Rch in IPGA exceeds
the ALC limiter detection level set by LMTH bit, the ALC recovery operation changes into the ALC limiter operation
immediately.
In case of
(Recovery waiting counter reset level) ≤ (IPGA output level) < (Limiter detection level)
during the ALC recovery operation, the waiting timer of ALC recovery operation is reset. Therefore, when
(Recovery waiting counter reset level) > (IPGA output level),
the waiting timer of ALC recovery operation starts.
The ALC operation of the AK4566 corresponds to the impulse noise. If the impulse noise is supplied, the ALC recovery
operation becomes the faster period than a set of ZTM1-0 or WTM1-0 bits.
Others:
When either channel enters the limiter operation during the waiting time of zero crossing, the present ALC recovery
operation stops, according as the small value of IPGA (a channel waiting zero crossing), the ALC limiter operation is done.
When both channels are waiting for the next ALC recovery operation, the ALC limiter operation is done from the IPGA
value of a point in time.
ZTM1-0 bits set zero crossing timeout and WTM1-0 bits set the ALC recovery operation period. When the ALC recovery
waiting time (WTM1-0 bits) is shorter than zero crossing timeout period (ZTM1-0 bits), the ALC recovery is operated by
the zero crossing timeout period. Therefore, in this case, the ALC recovery operation period is not constant.
REV 0.5
- 17 -
2002/2