AK4545 Datasheet, PDF (25/33 Pages) Asahi Kasei Microsystems – AC97 AUDIO CODEC WITH SRC AND DIT

[ASAHI KASEI]
[AK4545]
n S/PDIF Control Register (Index 70h)
The following table shows the relationship between the bit and control for S/PDIF out of the AK4545.
valid
ASLT
SPEN
IO
Bit
D15
D14
D1
D0
Function
Validity Bit
0 : valid, 1:invalid
Alternate Data Slot
0: slot 3/4 of SDATA_OUT
1: slot7/8 of SDATA_OUT
S/PDIF powerdown
0: powerdown 1:operation
Select signal of S/PDIFout data
0: D/A data
1: A/D data
Comment
This bit is output to the valid bit in subframe of S/PDIF.
In the case of IO=”0”, the dates of alternated slot of SDATA_OUT
are assigned in S/PDIF.
See below table.
S/PDIF will go into powerdown mode under the following conditions
even if SPEN is set to “1“.
1) PR3=”1” or PR4=”1” or PR5=”1”
2) IO=”0” and PR1 = “1”
3) IO=”1” and PR0 = “1”
It is recommended that S/PDIF is powered up from these mode after
SPEN is set to “0”.
Selected dates are output trough S/PDIF out.
See below table.
S/PDIF Out data are selected by IO and ASLT bits as the following table.
IO
ASLT
1
X
0
0
0
1
S/PDIF Out data
AD data
SDATA_OUT Slot3,4
SDATA_OUT Slot7,8
S/PDIF out128fs Clock
AD Clock
DA Clock
DA Clock
Note
1. Sample rate should be changed while S/PDIF is powered down.
2. IO and ASLT bits should be changed while S/PDIF is powered down.
n S/PDIF Channel Status1 Register (Index 72h)
The following table shows the relationship between the bit and the channel status bits for S/PDIF out of the AK4545.
Audio
Copy
Pre
CC14-CC8
L
Bit
D1
D2
D3
D14-D8
D15
Function
Bit 1 in the channel status data of consumer mode
0: 2ch Audio Data
1: Digital Data
Bit 2 in the channel status data of consumer mode
0: Copyright : yes
1: Copyright : no
Bit 3 in the channel status data of consumer mode
0: Pre emphasis OFF
1: Pre emphasis ON
Category code:bit8-14 in the channel status data of consumer mode.
Default : 0010010 (Digital mixer, original)
L:Generation Status: Bit 15 in the channel status data of consumer mode
n S/PDIF Channel Status2 Register (Index 74h)
The following table shows the relationship between the bit and the channel status bits for S/PDIF out of the AK4545.
SF3-SF0
Bit
D11-D8
Function
Sample Rate (Bit24-27 in the channel status data of consumer mode)
SF3 SF2 SF1 SF0
48KHz : 0 0 1 0
44.1KHz : 0 0 0 0
32KHz : 0 0 1 1
n Vendor ID Registers (Index 7Ch , 7Eh)
This register is a read only register that is used to determine the specific vendor identification. The ID method is Microsoft Plug and
Play Vendor ID code with upper byte of 7Ch register, the first character of that id, lower byte of 7Ch register, the second character
and upper byte of 7Eh register the third character. These three characters are ASCII encoded. Lower byte of 7E register is for the
Vendor Revision number.
AKM’s vender ID is “AKM”, and revision number is 0 7 for AK4545. As ASCII code “A” is 41h, “K” is 4Bh, and “M” is
4Dh, Vendor ID registers are 414Bh and 4D0 7h respectively for AK4545.
MS0058-E-00
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2000/11