AK4120 Datasheet, PDF (25/30 Pages) Asahi Kasei Microsystems – Sample Rate Converter with Mixer and Volume

ASAHI KASEI
[AK4120]
n Mapping of Program Registers
Addr
00H
01H
02H
03H
04H
05H
06H
Register Name
Control 1
Control 2
Control 3
Lch Volume#1 Control
Rch Volume#1 Control
Lch Volume#2 Control
Lch Volume#2 Control
D7
PW
0
MUTE2R
0
0
0
0
D6
0
ZELM
MUTE2L
GAIN6
GAIN6
GAIN6
GAIN6
D5
DIFO1
ZTM1
MUTE1R
GAIN5
GAIN5
GAIN5
GAIN5
D4
DIFO0
ZTM0
MUTE1L
GAIN4
GAIN4
GAIN4
GAIN4
D3
DIFI21
0
0
GAIN3
GAIN3
GAIN3
GAIN3
D2
DIFI20
OMCKS
0
GAIN2
GAIN2
GAIN2
GAIN2
D1
DIFI11
IMCKS2
PATH1
GAIN1
GAIN1
GAIN1
GAIN1
D0
DIFI10
IMCKS1
PATH0
GAIN0
GAIN0
GAIN0
GAIN0
Default
80H
20H
00H
10H
10H
10H
10H
Note: When the PDN goes to “L”, the registers are initialized to their default values.
Data must not be written to the address except 00H through 06H.
n Register Definitions
Addr Register Name
00H Control 1
Default
D7
D6
D5
D4
D3
D2
D1
D0
PW
0
DIFO1 DIFO0 DIFI21 DIFI20 DIFI11 DIFI10
1
0
0
0
0
0
0
0
DIFI11-0: Audio Data Formats for Input#1 port (See Table 6).
DIFI21-0: Audio Data Formats for Input#2 port (See Table 7).
DIFO1-0: Audio Data Formats for Output port (See Table 8).
PW: Power down control
0: Power Down
At PW=”0”, internal registers can be written.
1: Normal Operation (Default)
Addr Register Name
01H Control 2
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
ZELM ZTM1 ZTM0
0
OMCKS IMCKS2 IMCKS1
0
0
1
0
0
0
0
0
IMCKS1: Master Clock Speed of the Master Clock for Input#1 (IMCLK1)
0: 256fs(default)
1: 512fs
IMCKS2: Master Clock Speed of the Master Clock for Input#2 (IMCLK2)
0: 256fs(default)
1: 512fs
OMCKS: Master Clock Speed of the Master Clock for Output (OMCLK)
0: 256fs(default)
1: 512fs
Note: Set the PW= “0” when those master clocks are changed.
MS0134-E-00
- 25 -
2002/1