AK4120 Datasheet, PDF (22/30 Pages) Asahi Kasei Microsystems – Sample Rate Converter with Mixer and Volume

ASAHI KASEI
[AK4120]
(2)-2. READ Operations
To enable a READ operation in the AK4120, set R/WN bit = “1”. After transmission of data, the master can read the
next data address by generating an acknowledge instead of terminating the write cycle after the receipt the first data
word. After the receipt of each data, the internal 5-bit address counter is incremented by one, and the next data is taken
into next address automatically. If the address exceeds 06H prior to generating the stop condition, the address counter
will “roll over” to 00H and the previous data will be overwritten. If an address greater than 07H is set, this function will
not work properly.)
The AK4120 supports two basic read operations: CURRENT ADDRESS READ and RANDOM READ.
(2)-2-1. CURRENT ADDRESS READ
The AK4120 contains an internal address counter that maintains the address of the last word accessed, incremented by
one. Therefore, if the last access (either a read or write) were to address n, the next CURRENT READ operation would
access data from the address n+1. After receipt of the slave address with R/WN bit set to “1”, the AK4120 generates an
acknowledge, transmits 1data byte whose address is set by the internal address counter and increments the internal
address counter by 1. If the master does not generate an acknowledge to the data but instead generates a the stop
condition, the AK4120 ceases transmission
S
T
S
A
R/W N = “1”
T
R
O
T
P
SDA
S
Slave
Address
Data(n)
Data(n+1)
Data(n+2)
Data(n+x)
P
A
A
A
A
A
A
C
C
C
C
C
C
K
K
K
K
K
K
Figure 15. CURRENT ADDRESS READ
(2)-3-2. RANDOM READ
Random read operation allows the master to access any memory location at random. Prior to issuing the slave address
with the R/WN bit set to “1”, the master must first perform a “dummy” write operation. The master issues a start
request, slave address(R/WN=“0”) and the register address to read. After the register address’s acknowledged, the
master immediately reissues the start request and the slave address with the R/WN bit set to “1”. The AK4120 generates
a stop condition instead of an acknowledge, an acknowledge, 1byte data and increments the internal address counter by
1. If the master generates a stop condition instead of an acknowledge, the AK4120 stops transmitting.
S
S
T
T
S
A
R/WN= “0”
A
R/WN= “1”
T
R
R
O
T
T
P
SDA
S
Slave
Address
Sub
Address(n)
S
Slave
Address
Data(n)
Data(n+1)
Data(n+x)
P
A
A
C
C
K
K
A
A
A
A
A
C
C
C
C
C
K
K
K
K
K
Figure 16. RANDOM ADDRESS READ
MS0134-E-00
- 22 -
2002/1