AK4366_04 Datasheet, PDF (24/31 Pages) Asahi Kasei Microsystems – Low Power 24-Bit 2ch DAC with HP-AMP

ASAHI KASEI
[AK4366]
„ Register Definitions
Addr Register Name
00H Power Management
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
MUTEN PMHPR PMHPL PMDAC PMVCM
0
0
0
0
0
0
0
0
PMVCM: Power Management for VCOM Block
0: Power OFF (Default)
1: Power ON
In parallel mode (P/S pin = “H”), PMVCM bit is fixed to “1”.
PMDAC: Power Management for DAC Blocks
0: Power OFF (Default)
1: Power ON
When PMDAC bit is changed from “0” to “1”, DAC is powered-up to the current register values (ATT
value, sampling rate, etc). In parallel mode (P/S pin = “H”), PMDAC bit is fixed to “1”.
PMHPL: Power Management for Lch of Headphone Amp
0: Power OFF (Default). HPL pin becomes VSS (0V).
1: Power ON
PMHPR: Power Management for Rch of Headphone Amp
0: Power OFF (Default). HPR pin becomes VSS (0V).
1: Power ON
MUTEN: Headphone Amp Mute Control
0: Mute (Default). HPL and HPR pins go to VSS(0V).
1: Normal operation. HPL and HPR pins go to 0.45 x VDD.
All blocks can be powered-down by setting the PDN pin to “L” regardless of register values setup. All blocks can be
also powered-down by setting all bits of this address to “0”. In this case, control register values are maintained.
MS0248-E-01
- 24 -
2004/03