AK4366_04 Datasheet, PDF (22/31 Pages) Asahi Kasei Microsystems – Low Power 24-Bit 2ch DAC with HP-AMP

ASAHI KASEI
[AK4366]
„ Mode Control Interface
Some function of AK4366 can be controlled by both pins (parallel control mode) and register (serial control mode) shown
in Table 12. The serial control interface is enabled by the P/S pin = “L”. Internal registers may be written by 3-wire µP
interface pins: CSN, CCLK and CDTI. The data on this interface consists of Chip Address (2bits, fixed to “01”),
Read/Write (1bit; fixed to “1”, Write only), Register Address (MSB first, 5bits) and Control Data (MSB first, 8bits).
AK4366 latches the data on the rising edge of CCLK, so data should clocked in on the falling edge. The writing of data
becomes valid by 16th CCLK “↑”. The clock speed of CCLK is 5MHz (max).
Function
De-emphasis
SMUTE
Audio I/F Format
Digital Attenuator
Bass Boost
Power Management
Default State at PDN pin = “L” → “H”
Parallel mode
44.1kHz
Not Available
I2S, Left justified
Not Available
Not Available
Not Available
Power up
Serial mode
32kHz/44.1kHz/48kHz
Available
I2S, Left Justified, Right justified
Available
Available
Available
Power down
Table 12. Function List
PDN pin = “L” resets the registers to their default values. When the state of P/S pin is changed, AK4366 should be reset
by PDN pin = “L”.
CSN
CCLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
CDTI
C1 C0 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
C1-C0:
R/W:
A4-A0:
D7-D0:
Chip Address (Fixed to “01”)
READ/WRITE (Fixed to “1”, Write only)
Register Address
Control Data
Figure 18. 3-wire Serial Control I/F Timing
MS0248-E-01
- 22 -
2004/03