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AK4425A Datasheet, PDF (23/27 Pages) Asahi Kasei Microsystems – 192kHz 24-Bit Stereo ΔΣ DAC with 2Vrms Output
[AK4425A]
SYSTEM DESIGN
Figure 15 shows the system connection diagram. An evaluation board (AKD4425) is available for fast evaluation as well
as suggestions for peripheral circuitry.
Master Clock
64fs
24bit Audio Data
fs
μP
Digital Ground
Analog Ground
1 VDD
VSS1 16
2 MCLK
CP 15
3 BICK
CN 14
4 SDTI
VEE 13
5 LRCKAK4425AAOUTL 12
6 CSN
7 CCLK
VSS2 11
AVDD 10
8 CDTI
AOUTR 9
0.1u
+
10u
Analog
5.0V
1u (1)
+
1u (1)
Lch Out
0.1u +10u
Rch Out
Note:
Use low ESR (Equivalent Series Resistance) capacitors. When using polarized capacitors, the positive polarity pin
should be connected to the CP and VSS1 pin.
VSS1 and VSS2 should be separated from digital system ground.
Digital input pins should not be allowed to float.
Figure 15. Typical Connection Diagram
MS1127-E-01
- 23 -
2011/03