AK4425A Datasheet, PDF (19/27 Pages) Asahi Kasei Microsystems – 192kHz 24-Bit Stereo ΔΣ DAC with 2Vrms Output

[AK4425A]
■ Mode Control Interface
The function of the AK4425A can be controlled by register settings. The register can be accessed 50msec(max) after
power up the AK4425A. Internal registers may be written to 3-wire µP interface pins, CSN, CCLK and CDTI. The data
on this interface consists of Chip Address (2bits, C1/0; fixed to “01”), Read/Write (1bit; fixed to “1”, Write only),
Register Address (MSB first, 5bits) and Control Data (MSB first, 8bits). Address and data are clocked in on the rising
edge of CCLK. For write operations, the data is latched after a low-to-high transition of the 16th CCLK. The clock speed
of CCLK is 5MHz(max).
CSN
CCLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
CDTI
C1 C0 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
C1-C0:
R/W:
A4-A0:
D7-D0:
Chip Address (Fixed to “01”)
READ/WRITE (Fixed to “1”, Write only)
Register Address
Control Data
Figure 14. 3-wire Serial Control I/F Timing
MS1127-E-01
- 19 -
2011/03