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AK8451 Datasheet, PDF (22/42 Pages) Asahi Kasei Microsystems – 1 channel-input 16 bit 6MSPS ADC
ASAHI KASEI
[AK8451]
TMG_SHR:D[3:2] Feed-Through Level Sampling Pulse (SHR) Position
00
2×MCLK(1×) delay from the Data Level Sampling position
01
3×MCLK(1.5×) delay from the Data Level Sampling position
10
4×MCLK(2×) delay from the Data Level Sampling position
11
5×MCLK(2.5×) delay from the Data Level Sampling position
Note ) In the brackets (value), it is the value when the operation frequency= 4×MCLK.
CISIN0
MCLK
TSMP
Data Level Sampling
SHD
(Internal)
R0B3~B2=
00b
Reference Level Sampling
SHR
(Internal)
01b
10b
11b
AFE 1ch/ Single edge/ 4 bit bus mode input output timing
MS0937-E-01
22
2011/04