AK8451 Datasheet, PDF (21/42 Pages) Asahi Kasei Microsystems – 1 channel-input 16 bit 6MSPS ADC

ASAHI KASEI
Operation mode setting register 1 (Address “0000”, Reset “0000 0000”）
[AK8451]
RST：D7
Register reset
0
Register reset (At reset)
1
release from Reset
When this bit is set to “1“, all other registers are set to initial values, except for this bit.
When this bit is “1“, write operation into all other registers except for this bit is ignored.
Reserved 1：D6
0
1
Normal mode
Prohibited
OUT_DR：D5 Output Buffer Drivability
0
Normal ( at reset )
1
2× ( Double )
When Output Buffer Drivability is set to “2ד, maximum output current of the output buffers
increases. This selection is used when the Data Output Delay which is referenced to Data
Capture clock becomes too large, due to capacitive loading.
MD_CCD：D4 Input mode
0
DC Direct-Coupled mode
1
CDS mode
Signal Polarity which can be processed by the AK8451 is determined by the type of Input Modes.
In DC Direct-Coupled Mode, it handles Positive polarity (signal is output toward higher voltage
than reference level: VCLP ) and in CDS Mode, it handles Negative polarity (signal is output
toward lower voltage than reference level).
MS0937-E-01
21
2011/04