AK4352 Datasheet, PDF (2/13 Pages) Asahi Kasei Microsystems – 2V & LOW POWER MULTI-BIT DAC

ASAHI KASEI
[AK4352]
n Ordering Guide
AK4352VT
AKD4352
n Pin Layout
MCLK
PD
BICK
SDATA
LRCK
DIF0
DIF1
DEM
-40 ∼ +85°C
Evaluation Board
16pin TSSOP (0.65mm pitch)
1
16
CKS
2
15
VCML
3
14
AOUTL
4
Top
13
AOUTR
View
5
12
VCMR
6
11
VREF
7
10
VDD
8
9
VSS
PIN/FUNCTION
No. Pin Name
1 MCLK
2 PD
3 BICK
4 SDATA
5 LRCK
6 DIF0
7 DIF1
8 DEM
9 VSS
10 VDD
11 VREF
12 VCMR
13 AOUTR
14 AOUTL
15 VCML
16 CKS
I/O Function
I Master Clock Pin
Power-Down Pin
I
When at “L”, the AK4352 is in power-down mode and is held in reset.
The AK4352 should always be reset upon power-up.
I
Serial Bit Input Clock Pin
This clock is used to latch audio data.
I Audio Data Input Pin
L/R Clock Pin
I
This input determines which audio channel is currently being input on
SDATA
pin.
I Digital Input Format Pin
I
These pins select one of four input modes.
I
De-emphasis Enable Pin
When at “H”, de-emphasis of fs=44.1kHz is enabled.
- Ground Pin
- Power Supply Pin
I
Reference Voltage Input Pin
Normally connected to VDD.
O Rch Common Voltage Pin
O Rch Analog Output Pin
O Lch Analog Output Pin
O Lch Common Voltage Pin
I
Master Clock Select Pin
“L”: 256fs “H”: 384fs
Note: All input pins should not be left floating.
M0040-E-02
-2-
2000/11