AK4524 Datasheet, PDF (13/31 Pages) Asahi Kasei Microsystems – 24BIT 96KHZ AUDIO CODEC

ASAHI KASEI
[AK4524]
n Audio Serial Interface Format
Five serial modes selected by the DIF0 and DIF1 pins are supported as shown in Table 4. In all modes the serial data has
MSB first, 2’s compliment format. The SDTO is clocked out on the falling edge of BICK and the SDTI is latched on the
rising edge. The interface supports both master mode and slave mode. In master mode, BICK and LRCK are outputs and
the frequency of BICK is fixed to 64fs.
Mode
0
1
2
3
4
DIF2
0
0
0
0
1
DIF1
0
0
1
1
0
DIF0
0
1
0
1
0
SDTO
24bit, MSB justified
24bit, MSB justified
24bit, MSB justified
24bit, IIS (I2S)
24bit, MSB justified
SDTI
16bit, LSB justified
20bit, LSB justified
24bit, MSB justified
24bit, IIS (I2S)
24bit, LSB justified
LRCK
H/L
H/L
H/L
L/H
H/L
BICK
³ 32fs
³ 40fs
³ 48fs
³ 48fs
³ 48fs
at reset
Table 4. Audio data format
LRCK
01 23
BICK(32fs)
9 10 11 12 13 14 15 0 1 2
SDTO(o)
23 22 21
15 14 13 12 11 10 9 8 23 22 21
9 10 11 12 13 14 15 0 1
15 14 13 12 11 10 9 8 23
SDTI(i)
15 14 13
7 6 5 4 3 2 1 0 15 14 13
7 6 5 4 3 2 1 0 15
01 23
BICK(64fs)
SDTO(o)
23 22 21
17 18 19 20
7 65 43
30 31 0 1 2 3
23 22 21
17 18 19 20
76 5 43
31 0 1
23
SDTI(i)
Don’t Care 15 14 13 12 11 2 1 0 Don’t Care
SDTO-19:MSB, 0:LSB; SDTI-15:MSB, 0:LSB
Lch Data
Figure 1. Mode 0 Timing
15 14 13 12 11 2 1 0
Rch Data
LRCK
01 2
BICK(64fs)
12 13 14
24 25
SDTO(o)
23 22
12 11 10
0
31 0 1 2
12 13 14
24 25
23 22
12 11 10
0
31 0 1
23
SDTI(i)
Don’t Care 19 18
87
1 0 Don’t Care
SDTO-23:MSB, 0:LSB; SDTI-19:MSB, 0:LSB
Lch Data
Figure 2. Mode 1 Timing
19 18
87
Rch Data
10
M0050-E-01
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1999/5