AK4393_03 Datasheet, PDF (11/23 Pages) Asahi Kasei Microsystems – Advanced Multi-Bit 96kHz 24-Bit ΔΣ DAC

ASAHI KASEI
[AK4393]
„ Audio Serial Interface Format
Data is shifted in via the SDATA pin using BICK and LRCK inputs. Five data formats are supported and selected by the
DIF0-2 as shown in Table 5. In all formats the serial data is MSB-first, 2's compliment format and is latched on the rising
edge of BICK. Mode 2 can be used for 20 and 16 MSB justified formats by zeroing the unused LSBs.
Mode
0
1
2
3
4
DIF2
0
0
0
0
1
DIF1
0
0
1
1
0
DIF0
0
1
0
1
0
Mode
0: 16bit LSB Justified
1: 20bit LSB Justified
2: 24bit MSB Justified
3: I²S Compatible
4: 24bit LSB Justified
BICK
≥32fs
≥40fs
≥48fs
≥48fs
≥48fs
Figure
Figure 1
Figure 2
Figure 3
Figure 4
Figure 2
Table 5. Audio Data Formats
LRCK
BICK
(32fs)
SDATA
Mode 0
BICK
(64fs)
SDATA
Mode 0
01
10 11 12 13 14 15 0 1
15 14
01
6 5 4 3 2 1 0 15 14
14 15 16 17
31 0 1
Don’t care
15 14
15:MSB, 0:LSB
Lch Data
0 Don’t care
10 11 12 13 14 15 0 1
6 5 4 3 2 1 0 15 14
14 15 16 17
31 0 1
15 14
0
Rch Data
Figure 1. Mode 0 Timing
LRCK
BICK
(64fs)
SDATA
Mode 1
SDATA
Mode 4
01
8 9 10 11 12
Don’t care
19
19:MSB, 0:LSB
Don’t care 23 22 21 20 19
23:MSB, 0:LSB
Lch Data
31 0 1
8 9 10 11 12
0 Don’t care
19
0 Don’t care 23 22 21 20 19
Rch Data
31 0 1
0
0
Figure 2. Mode 1,4 Timing
M0039-E-02
- 11 -
2003/09