AK4527B Datasheet, PDF (10/33 Pages) Asahi Kasei Microsystems – HIGH PERFORMANCE MULTI-CHANNEL AUDIO CODEC

ASAHI KASEI
[AK4527B]
DC CHARACTERISTICS
(Ta=25°C; AVDD, DVDD=4.5∼5.5V; TVDD=2.7∼5.5V)
Parameter
Symbol
min
typ
High-Level Input Voltage
VIH
2.2
-
Low-Level Input Voltage
VIL
-
-
High-Level Output Voltage
(SDTO pin:
Iout=-100µA) VOH TVDD-0.5
-
(DZF1, DZF2/OZF pins:
Low-Level Output Voltage
Iout=-100µA) VOH AVDD-0.5
-
(SDTO, DZF1, DZF2/OZF pins: Iout= 100µA) VOL
-
-
(SDA pin:
Iout= 3mA) VOL
-
-
Input Leakage Current
Iin
-
-
max
Units
-
V
0.8
V
-
V
-
V
0.5
V
0.4
V
±10
µA
SWITCHING CHARACTERISTICS
(Ta=25°C; AVDD, DVDD=4.5∼5.5V; TVDD=2.7∼5.5V; C_L=20pF)
Parameter
Symbol
min
typ
Master Clock Input
256fsn, 128fsd:
fCLK
8.192
Pulse Width Low
tCLKL
27
Pulse Width High
tCLKH
27
384fsn, 192fsd:
fCLK
12.288
Pulse Width Low
Pulse Width High
tCLKL
20
tCLKH
20
512fsn, 256fsd:
Pulse Width Low
fCLK
tCLKL
16.384
15
Pulse Width High
tCLKH
15
LRCK frequency
Normal Speed Mode
Double Speed Mode
fsn
32
fsd
64
Duty Cycle
Duty
45
Audio Interface Timing
BICK Period
tBCK
160
BICK Pulse Width Low
tBCKL
65
Pulse Width High
tBCKH
65
LRCK Edge to BICK “↑”
(Note 19) tLRB
45
BICK “↑” to LRCK Edge
(Note 19) tBLR
45
LRCK to SDTO(MSB)
tLRS
BICK “↓” to SDTO
tBSD
SDTI1-3, DAUX Hold Time
tSDH
40
SDTI1-3, DAUX Setup Time
tSDS
25
Notes: 19. BICK rising edge must not occur at the same time as LRCK edge.
max
12.288
18.432
24.576
48
96
55
40
40
Units
MHz
ns
ns
MHz
ns
ns
MHz
ns
ns
kHz
kHz
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
MS0056-E-00
- 10 -
2000/10