AK4113_1 Datasheet, PDF (10/49 Pages) Asahi Kasei Microsystems – 192KHZ 24BIT DIR WITH 6:1 SELECTOR

ASAHI KASEI
SWITCHING CHARACTERISTICS (Continued)
(Ta=25°C; AVDD, DVDD=2.7~3.6V, TVDD=2.7~5.5V; C_L=20pF)
Parameter
Symbol
min
typ
Control Interface Timing (4-wire serial mode)
CCLK Period
tCCK
200
CCLK Pulse Width Low
tCCKL
80
Pulse Width High
tCCKH
80
CDTI Setup Time
tCDS
50
CDTI Hold Time
tCDH
50
CSN “H” Time
tCSW
150
CSN “↓” to CCLK “↑”
CCLK “↑” to CSN “↑”
CDTO Delay
CSN “↑” to CDTO Hi-Z
Control Interface Timing (I²C Bus mode):
tCSS
50
tCSH
50
tDCD
tCCZ
SCL Clock Frequency
fSCL
-
Bus Free Time Between Transmissions
tBUF
1.3
Start Condition Hold Time (prior to first clock pulse) tHD:STA
0.6
Clock Low Time
tLOW
1.3
Clock High Time
tHIGH
0.6
Setup Time for Repeated Start Condition
tSU:STA
0.6
SDA Hold Time from SCL Falling (Note 8)
tHD:DAT
0
SDA Setup Time from SCL Rising
tSU:DAT
0.1
Rise Time of Both SDA and SCL Lines
tR
-
Fall Time of Both SDA and SCL Lines
tF
-
Setup Time for Stop Condition
tSU:STO
0.6
Capacitive load on bus
Cb
-
Pulse Width of Spike Noise Suppressed by Input Filter
tSP
0
Reset Timing
PDN Pulse Width
tPW
150
Note 8. Data must be held for sufficient time to bridge the 300ns transition time of SCL.
Note 9. I²C is a registered tradmark of Philips Semiconductors.
[AK4113]
max Units
ns
ns
ns
ns
ns
ns
ns
ns
45
ns
70
ns
400
kHz
-
µs
-
µs
-
µs
-
µs
-
µs
-
µs
-
µs
0.3
µs
0.3
µs
-
µs
400
pF
50
ns
ns
MS0349-E-02
- 10 -
2005/08