TSI-1 Datasheet, PDF (46/61 Pages) Agere Systems – 1k x 1k Time-Slot Interchanger

TSI-1
1k x 1k Time-Slot Interchanger
Data Sheet, Revision 3
September 21, 2005
Table 6-39. TPM_Error_Count (Sat/Roll*)
Address Bit
Name/Description
Default
0x00608 15:0 TPM_Error_Count. This status register accumulates the number of pattern bit errors
detected in the monitored time slot(s).
0x0000
„ If Saturate_Rollover_Select (see Table 6-15 on page 37) is set to a 1, this register will sat-
urate at 0xFFFF and not be allowed to roll over.
„ If Saturate_Rollover_Select is set to a 0, the counter will roll over (count to 0x0 on the next
error after 0XFFFF), the Pattern_Error_Detected status bit (see Table 6-42 on page 47)
will not be reset.
The TPM_Error_Count register can be reset in one of the following four ways:
1. The pattern is changed.
2. The bit RESET_TPM_Error_Counter (in the TPM_Configuration register, see Table 6-37
on page 45) is asserted.
3. This register is written. The TPM_Error_Count register will be set to 0x0000 independent
of the value written.
4. This register is read when Register_Clearing_Mode = 1 (see Table 6-15 on page 37).
Note: Since TPM_Error_Count is the source of Pattern_Error_Detected status bit (see
Table 6-42 on page 47), then the clearing of this register will also clear the error bit.
* See Table 6-15 on page 37 bit 2.
Table 6-40. TPG_Inject_Error_Count (Write Only)
Address
0x0060A
Bit
Name/Description
Default
15:0 TPG_Inject_Error_Count. This register specifies the number of errors to be injected. The 0x0000
actual number of bit errors that will be injected will equal to the TPG_Inject_Error_Count x
N, where N is the number of bits set to 1 in the TPG_Data_Invert_Mask. The readback of
this register will always reflect the remaining error count and not the original number written
to this register.
This register provides a mask for specifying which bits of TPG data are to be inverted when forcing errors.
Table 6-41. TPG_Data_Invert_Mask (Read/Write)
Address
0x0060C
Bit
Name/Description
Default
15:8 Unused.
7:0 Data_Invert_Mask. The contents of this register are XORed with the TPG output word pro-
viding bit-wise error control.
—
0x00
Note: If Data_Invert_Mask = 0x00, then no errors will be injected.
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