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TFRA08C13 Datasheet, PDF (1/188 Pages) Agere Systems – TFRA08C13 OCTAL T1/E1 Framer
Preliminary Data Sheet
October 2000
TFRA08C13 OCTAL T1/E1 Framer
Features
s Eight independent T1/E1 transmit and receive
framers.
s Internal DS1 transmit clock synthesis—no external
oscillator necessary.
s Comprehensive alarm reporting and performance
monitoring:
— Programmable automatic and on-demand alarm
transmission.
s Automatic facility data link:
— Automatic transmission of ESF performance
report message.
s Common 2.048 Mbits/s, 4.096 Mbits/s, or
8.192 Mbits/s TDM highway.
s Dual- or single-rail line-side I/O.
s Supports one second polling interval for perfor-
mance monitoring.
s IEEE * Std. 1149.1 JTAG boundary scan.
s 3.3 V low-power CMOS with 5 V tolerant inputs.
s Available in 352-pin PBGA.
T1/E1 Framer Features
s Supports T1 framing modes ESF, D4, SLC ®-96,
T1DM DDS.
s Supports G.704 basic and CRC-4 multiframe for-
mat E1 framing and procedures consistent with
G.706.
s Supports unframed transmission format.
s T1 signaling modes: transparent; ESF 2-state,
4-state, and 16-state; D4 2-state and 4-state;
SLC-96 2-state, 4-state, 9-state, and 16-state. E1
signaling modes: transparent and CAS.
s Alarm reporting and performance monitoring per
AT&T, ANSI †, and ITU-T standards.
s Programmable, independent transmit and receive
system interfaces at a 2.048 MHz, 4.096 MHz, or
8.192 MHz data rate.
Facility Data Link Features
s HDLC or transparent mode.
s Automatic transmission of the ESF performance
report messages (PRM).
s Detection of the ESF PRM.
s Detection of the ANSI ESF FDL bit-oriented codes.
s 64-byte FIFO in both transmit and receive direc-
tions.
s Programmable FIFO full and empty level interrupt.
s User-programmable microprocessor interface.
Microprocessor Interface
s 33 MHz read and write access.
s 12-bit address, 8-bit data interface.
s Intel ‡ or Motorola§ style control interfaces.
s Directly addressable internal registers.
s Programmable interrupts.
Applications
s DS3 and E3 port cards for narrowband DXCs.
s Multiservice switches.
s High density DS1 and E1 port cards.
s Frame relay access devices.
s Byte-synchronous SDH/SONET mapping.
s SONET and SDH drop alignment.
s IP and packet routers.
* IEEE is a registered trademark of The Institute of Electrical and
Electronics Engineers, Inc.
† ANSI is a registered trademark of American National Standards
Institute, Inc.
‡ Intel is a registered trademark of Intel Corporation.
§ Motorola is a registered trademark of Motorola, Inc.