CT2566 Datasheet, PDF (7/37 Pages) Aeroflex Circuit Technology – CT2566 MIL-STD-1553 to Microprocessor Interface Unit

MEMORY MANAGEMENT
The RAM used by the CT2566 can be any standard
static memory with a WRITE STROBE pulse width
requirement less than 70ns. The RAM area is broken
down into pointers, look-up tables, and data blocks. All
1553 operation control is accomplished through the
RAM, including fault monitoring and data block
transfers.
For most applications, a 4K x 16 memory is sufficient
to store the number of messages, but the CT2566 can
access up to 64K words.
DOUBLE BUFFERING
A Double Buffering system is available to prevent
partially updated data blocks from being read by the
CPU or transferred onto the 1553 Data Bus. To use
Double Buffering the CPU must divide the RAM into
two areas: “current” and “non-current”. Two Stack
Pointers, Descriptor Stacks, and Look-Up Tables are
required to be used by the CPU.
The 1553 device has access only to the current area
of RAM, and will use the current Descriptor Stack and
Look-Up Table. While the 1553 device is processing
messages using the current area pointers, the CPU
can be setting up the next set of messages in the
non-current area of RAM.
Once an EOM or BCEOM occurs, the CPU can swap
the current and non-current areas by toggling bit 13 of
the Configuration Register (See register section for
description). The 1553 device will then have access to
the new current area. Meanwhile, the CPU can begin
processing the data received during the previous
transfer or can begin setting up the next set of 1553
messages.
50 CTLOUT B/A
INCMD
NODT
12 MHz
DQ
LS74
CQ
49 CTLIN B/A
Notes:
(1) INCMD is from the BUS-65600 or BUS-65112.
(2) CTLOUT B/A reflects bit 13 of the Configuration Register.
(3) CTLIN B/A is used to select the current area.
Figure 3 – Synchronized map switching u
the CT2566
An external circuit (shown in Figure 3) can be added
to ensure that the swapping of the current and
non-current areas doesn’t occur while the CT2566 is
processing a message from the 1553 device. During
message processing, the INCMD is a logic "0" and the
CPU’s map area selection is inhibited. CTLIN B/A will
be automatically latched back into the CT2566 when
INCMD and NODT change to a logic "1".
DESCRIPTOR STACK
The CT2566 uses a Descriptor Stack in BC and RTU
modes. Each stack entry contains four words which
refer to one 1553 message (See Figure 4). The Block
Status Word, shown in Figure 5, indicates the physical
bus which received the message (RTU mode), reports
whether or not an error was detected during message
transfer, and indicates whether the message was
completed (SOM replaced with EOM).
The user-supplied Time-Tag word is loaded at the
start of a message transfer and is updated at the end of
the transfer.
The contents of the fourth word in the Descriptor
Stack depends on the operating mode. In BC mode, it
contains the address of the message data block
containing the 1553 message formatted as shown in
Figure 6. In RTU mode, the word contains the received
1553 Command Word as shown in Figure 7.
A Stack Pointer must be initialized by the CPU. The
Descriptor Stack contains 64, four word entries, and
BLOCK STATUS WORD
TIME TAG WORD
RESERVED
MESSABE BLOCK ADDRESS
BC DESCRIPTION BLOCK
BLOCK STATUS WORD
TIME TAG WORD
RESERVED
RECEIVED COMMAND WORD
RTU DESCRIPTION BLOCK
Figure 4 – Descriptor Stack Entries
automatically wraps around (the 64th entry is followed
by the first entry). The 1553 device uses the current
area Stack Pointer to determine the address of the
Stack entry to be used for the current 1553 message.
The CT2566 automatically increments the current area
Stack Pointer by four upon the completion of each
Aeroflex Circuit Technology
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