CT2566 Datasheet, PDF (19/37 Pages) Aeroflex Circuit Technology – CT2566 MIL-STD-1553 to Microprocessor Interface Unit

12MHz Clock
(Internal)
STRBD (41)
SELECT (1)
IOEN (42)
READYD (3)
MEM/REG (10)
RD/WR (2)
A02 (38)
See Note
td1
td7
td2
tpw1
A01 (77)
A00 (39)
SSFLAG, SSBUSY, SVCRQST
DBAC, RTU/BC, MT, CTLIN B/A
D15-D00
DATA VALID
NOTE: STRBD to IOEN (low) delay is two clock cycles. If contention occurs, delay is two clock cycles following release of bus.
SYMBOL
td1
td2
tpw1
td7
CPU Reads from Internal Register
DESCRIPTION
MIN
READYD low delay (CPU Handshake)
-
IOEN high delay (CPU Handshake)
-
READYD pulse width (CPU Handshake)
70
Internal Register delay (read)
-
MAX
200
20
-
60
UNITS
ns
ns
ns
ns
Aeroflex Circuit Technology
Figure 21 – CPU reads from internal register
19
SCDCT2566 REV B 8/10/99 Plainview NY [phone]