CT2566 Datasheet, PDF (23/37 Pages) Aeroflex Circuit Technology – CT2566 MIL-STD-1553 to Microprocessor Interface Unit

12MHz Clock
(Internal)
STRBD (41)
SELECT (1)
IOEN (42)
READYD (3)
MEM/REG (10)
RD/WR (2)
MEMCS (16)
MEMOE (56)
A15-A00
D15-D00
See Note
td1
td2
tpw1
td4
RAM ADDRESS VALID
RAM DATA VALID
NOTE: STRBD to IOEN (low) delay is two clock cycles. If contention occurs, delay is two clock cycles following release of bus.
SYMBOL
td1
td2
tpw1
td9
CPU Reads from Ram
DESCRIPTION
MIN
READYD low delay (CPU Handshake)
-
IOEN high delay (CPU Handshake)
-
READYD pulse width (CPU Handshake)
70
CPU MEMOE low delay
-
MAX
200
20
-
115
UNITS
ns
ns
ns
ns
Aeroflex Circuit Technology
Figure 25 – CPU reads from RAM
23
SCDCT2566 REV B 8/10/99 Plainview NY [phone]