DAC8420_07 Datasheet, PDF (9/24 Pages) Analog Devices – Quad 12-Bit Serial Voltage Output DAC

DAC8420
Table 6. Control Function Logic Table
CLK¹ CS¹
LD
CLR CLSEL
NC²
High
High Low High
NC²
High
High Low Low
NC²
High
High ↑
High /Low
↑
Low
High High NC²
Low ↑
High High NC²
High NC (↑)² ↓
High NC²
High NC²
Low High NC²
NC²
High
High High NC²
Serial Input Shift Register
No change
No change
No change
Shifts register one bit
Shifts register one bit
No change
No change
No change
DAC Register A to DAC Register D
Loads midscale value (0x800)
Loads zero-scale value (0x000)
Latches value
No change
No change
Loads the serial data-word³
Transparent ⁴
No change
1 _{CLK and CS are interchangeable.}
2 _{NC = Don’t Care.}
3 _{Returning CS high while CLK is high avoids an additional false clock of serial input data. CLK and CS are interchangeable.}
4 _{Do not clock in serial data while LD is low.}
Rev. B | Page 9 of 24