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DAC8420_07 Datasheet, PDF (12/24 Pages) Analog Devices – Quad 12-Bit Serial Voltage Output DAC
DAC8420
1.5
1.0
0.5
0
–0.5
–1.0
0
TA = +25°C
VDD = +15V
VSS = –15V
VVREFHI = +10V
VVREFLO = –10V
500 1000 1500 2000 2500 3000 3500 4000 4500
DIGITAL INPUT CODE
–2.50µV
LD
1.22mV
1 LSB
0mV
Figure 18. IVREFHI vs. Code
TA = +25°C
VDD = +5V
VSS = –5V
VVREFHI = +2.5V
VVREFLO = –2.5V
–10.25mV
–4.9µs
tSETT
8µs
5µs/DIV
Figure 19. Positive Settling Time (±5 V)
6.5mV
CLR
45.1µs
TA = +25°C
VDD = +5V
VSS = –5V
VVREFHI = +2.5V
VVREFLO = –2.5V
0mV
1 LSB
1.22mV
3.5mV
–4.9µs
tSETT
8µs
5µs/DIV
Figure 20. Negative Settling Time (±5 V)
45.1µs
31.25mV
LD
TA = +25°C
VDD = +15V
VSS = –15V
VVREFHI = +10V
VVREFLO = –10V
4.88mV
1 LSB
0mV
–18.75mV
–9.8µs
tSETT
13µs
10µs/DIV
Figure 21. Positive Settling Time (±15 V)
90.2µs
43.75mV
CLR
TA = +25°C
VDD = +15V
VSS = –15V
VVREFHI = +10V
VVREFLO = –10V
0mV
1 LSB
–4.88mV
–6.25mV
–9.8µs
tSETT
13µs
10µs/DIV
Figure 22. Negative Settling Time (±15 V)
90.2µs
5V
TA = +25°C
VDD = +5V
VSS = –5V
VVREFHI = +2.5V
VVREFLO = –2.5V
+1V/DIV
0
–5V
–47.6µs
SRRISE
=
1.65
V
µs
20µs/DIV
SRFALL
=
1.17
V
µs
Figure 23. Slew Rate (±5 V)
152.4µs
Rev. B | Page 12 of 24