AD9694 Datasheet, PDF (75/101 Pages) Analog Devices – 14-Bit, 500 MSPS JESD204B, Quad Analog-to-Digital Converter

Data Sheet
AD9694
MEMORY MAP REGISTER TABLE—DETAILS
All address locations that are not included in Table 39 are not currently supported for this device and must not be written.
Table 39. Memory Map Details
Addr
Name
Bits
0x0000
Global map 7
SPI Config-
uration A
6
5
4
3
2
1
0
0x0001
Global map 7
SPI Config-
uration B
[6:2]
1
0
Bit Name
Settings Description
Reset Access
Soft reset (self clearing)
When a soft reset is issued, the user must wait 0x0 R/W
5 ms before writing to any other register. This
wait provides sufficient time for the boot
loader to complete.
0
Do nothing.
1
Reset the SPI and registers (self clearing).
LSB first mirror
0x0 R/W
1
LSB shifted first for all SPI operations.
0
MSB shifted first for all SPI operations.
Address ascension
mirror
0x0 R/W
0
Multibyte SPI operations cause addresses to
auto-increment.
1
Multibyte SPI operations cause addresses to
auto-increment.
Reserved
Reserved.
0x0 R
Reserved
Reserved.
0x0 R
Address ascension
0x0 R/W
0
Multibyte SPI operations cause addresses to
auto-increment.
1
Multibyte SPI operations cause addresses to
auto-increment.
LSB first
0x0 R/W
1
MSB shifted first for all SPI operations.
0
MSB shifted first for all SPI operations.
Soft reset (self clearing)
When a soft reset is issued, the user must wait 0x0 R/W
5 ms before writing to any other register. This
wait provides sufficient time for the boot
loader to complete.
0
Do nothing.
1
Reset the SPI and registers (self clearing).
Single instruction
0x0 R/W
0
SPI streaming enabled.
1
Streaming (multibyte read/write) is disabled.
Only one read or write operation is performed
regardless of the state of the CSB line.
Reserved
Reserved.
0x0 R
Datapath soft reset (self
clearing)
0x0 R/W
0
Normal operation.
1
Datapath soft reset (self clearing)
Reserved
Reserved.
0x0 R
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