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DAC8512 Datasheet, PDF (7/20 Pages) Analog Devices – % V, Serial Input Complete 12-Bit DAC
5
VDD = +5V
TA = +25؇C
4
RLL TIEDD TTOO AAGGNNDD
DA=TFAF=FHFFF H
3
2
1
RL TIED TO +5V
DATA = 000H
0
10
100
1k
10k
100k
LOAD RESISTANCE – ⍀
Figure 5. Output Swing vs. Load
Typical Performance Characteristics — DAC8512
100
VDD = +5V
DATA = 000H
10
1
TA = +85؇C
TA = +25؇C
0.1
TA = –40؇C
0.01
1
10
100
1000
OUTPUT SINK CURRENT – ␮A
Figure 6. Pull-Down Voltage vs. Out-
put Sink Current Capability
80
POS0
60
CURRENT0
LIMIT0
40
20
0
DATA = 800H
RL TIED TO +2V
–20
–40
–60
–80
–100
NEG
CURRENT
LIMIT
1
2
3
OUTPUT VOLTAGE – Volts
Figure 7. Short Circuit Current
50mV
100
90
10
0%
2mS
CODE = FFFH = 409510
BW = 630kHz
SCALE = 100X
TA = +25؇C
TIME = 2ms/DIV
Figure 8. Broadband Noise
4.0
VDD = +5V
3.2
TA = +25؇C
NO LOAD
2.4
1.6
0.8
0.0
0
1
2
3
4
5
LOGIC VOLTAGE VALUE – Volts
Figure 9. Supply Current vs. Logic
Input Voltage
100
VDD = +5V ؎200mV AC
80
TA = +25؇C
DATA = FFFH
60
40
20
0
10
100
1k
10k
100k
FREQUENCY – Hz
Figure 10. Power Supply Rejection
vs. Frequency
5.0
∆VFS ≤ 1 LSB
4.8
DATA = FFFH
TA = +25؇C
4.6
PROPER OPERATION
4.4
WHEN VDD SUPPLY
VOLTAGE ABOVE
CURVE
4.2
4.0
0.01
0.04 0.1
0.4 1.0
4.0 10
OUTPUT LOAD CURRENT – mA
Figure 11. Minimum Supply Voltage
vs. Load
5
0
2.048
2.038
2.028
2.018
204810 TO 204710
VDD = 5V
TA = +25؇C
TIME – 200ns/DIV
Figure 12. Midscale DAC Glitch
Performance
1V
100
90
RL = NO LOAD
CL = 110pF
10
TA = +25؇C
0%
20µs
TIME = 20µs/DIV
Figure 13. Large Signal Settling Time
REV. A
–7–