DAC8512 Datasheet, PDF (18/20 Pages) Analog Devices – % V, Serial Input Complete 12-Bit DAC

DAC8512
*
PORTC
*
DDRC
PORTD
*
DDRD
SPCR
*
SPSR
*
SPDR
*
EQU
EQU
EQU
EQU
EQU
EQU
EQU
* SDI RAM variables:
*
*
*
*
SDI1
EQU
SDI2
EQU
*
ORG
INIT
LDS
*
LDAA
*
STAA
LDAA
STAA
*
LDAA
*
STAA
LDAA
STAA
*
LDAA
STAA
*
BSR
JMP
*
UPDATE
PSHX
PSHY
PSHA
*
LDAA
STAA
*
LDAA
STAA
*
LDX
LDY
*
BCLR
*
*
DAC8512–M68HC11 Interface Program Source Code
$1003
$1007
$1008
$1009
$1028
$1029
$102A
Port C control register
“0,0,0,0;0,0,CLR/,CS/”
Port C data direction
Port D data register
“0,0,LD/,SCLK;SDI,0,0,0
Port D data direction
SPI control register
“SPIE,SPE,DWOM,MSTR;CPOL,CPHA,SPRl,SPR0”
SPI status register
“SPIF,WCOL,0,MODF;0,0,0,0”
SPI data register; Read-Buffer; Write-Shifter
$00
$01
$C000
#$CFFF
#$03
PORTC
#$03
DDRC
#$30
PORTD
#$38
DDRD
#$5F
SPCR
UPDATE
$E000
SDI1 is encoded from 0 (Hex) to F (Hex)
SDI2 is encoded from 00 (Hex) to FF (Hex)
DAC requires two 8-bit loads; upper 4 bits of SDI1
are ignored.
SDI packed byte 1 “0,0,0,0;MSB,DB10,DB9,DB8”
SDI packed byte 2 “DB7,DB6,DB5,DB4;DB3,DB2,DB1,DB0”
Start of user’s RAM in EVB
Top of C page RAM
0,0,0,0;0,0,1,1
CLR/-Hi, CS/-Hi
Initialize Port C Outputs
0,0,0,0;0,0,1,1
CLR/ and CS/ are now enabled as outputs
0,0,1,1;0,0,0,0
LDI-Hi,SCLK-Hi,SDI-Lo
Initialize Port D Outputs
0,0,1,1;1,0,0,0
LD/,SCLK, and SDI are now enabled as outputs
SPI is Master,CPHA=1,CPOL=1,Clk rate=E/32
Xfer 2 8-bit words to DAC8512
Restart BUFFALO
Save registers X, Y, and A
#$0A
SDI1
0,0,0,0;1,0,1,0
SDI1 is set to 0A (Hex)
#$AA
SDI2
1,0,1,0;1,0,1,0
SDI2 is set to AA (Hex)
#SDI1
#$1000
Stack pointer at 1st byte to send via SDI
Stack pointer at on-chip registers
PORTC,Y
$02 Assert CLR/
BSET
PORTC,Y $02 De-assert CLR/
BCLR
PORTC,Y $01 Assert CS/
–18–
REV. A