EVAL-ADP1829_15 Datasheet, PDF (5/16 Pages) Analog Devices – Evaluation Board for Dual, Interleaved

The external current-limit resistor can be calculated by the
following equation:
R_CLS
=
⎜⎛
⎝
I
limit
+
ΔI_L
2
⎟⎠⎞^R_DSON
50μA
(12)
where I_limit is the limit current.
VOLTAGE TRACKING
The ADP1829 features tracking inputs, TRK1 and TRK2, which
make the output voltage track another voltage. This is especially
useful in core and I/O voltage sequencing applications.
The ADP1829 tracking input is an additional positive input to
the error amplifier. The feedback voltage is regulated to the
lower of the 0.6 V reference or the voltage at TRK, so a lower
voltage on TRK limits the output voltage. This feature allows
implementation of two different types of tracking: coincident
tracking, where the output voltage is the same as the master
voltage until the master voltage reaches regulation, or ratio-
metric tracking, where the output voltage is limited to a fraction
of the master voltage. In all tracking configurations, the master
voltage should be higher than the slave voltage.
Note that the soft-start time of the master voltage should be set
to be longer than the soft start of the slave voltage. That forces
the rise time of the master voltage to be imposed on the slave
voltage. If the soft start of the slave voltage is longer, the slave
comes up more slowly and the tracking relationship is not seen
at the output. The slave channel should still have a soft-start
capacitor to give a small but reasonable soft-start time to
protect in case of restart after a current-limit event. For more
information about the voltage tracking, see the ADP1829
data sheet.
COMPENSATION DESIGN
Figure 2 shows the voltage mode control loop for a synchronous
buck converter. Usually, design the compensator to get adequate
phase margin and high cross frequency for stable operation and
good transient response. There are two types of compensation
circuits for the ADP1829, Type II and Type III. For more
details, see the ADP1829data sheet.
EVAL-ADP1829
L
C
V_IN
R
ESR
Z₁
Z₂
PWM
COMPARATOR
ERROR REFERENCE
AMP
COMPARATOR
Figure 2. Voltage Mode Buck Converter
V_O
R3
R2
C3
C1
R4
C2
R1 ^REFERENCE
COMP
Figure 3. Type III Compensation Circuit
The buck converter control to output transfer function can be
described by the following equation:
1+ ^s
G_vd (s) =
v_o(s)
d(s)
=
V_IN
1+ ¹
R
×
2πf_Z
1
+
s
Q2π
f_O
+
s²
(2π f_O)²
(13)
where:
f_Z
=
1
2πR_C C
f_O =
R
R + R_C
2π LC
Q = ^1+R × ¹
L + R R_CC 2 π f_O
RC is the ESR of the output capacitor.
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