ADAR7251_15 Datasheet, PDF (40/72 Pages) Analog Devices – 4-Channel, 16-Bit, Continuous Time Data Acquisition ADC

ADAR7251
Bits Bit Name
5
LN_PG2_EN
4
LN_PG1_EN
3
ADC4_EN
2
ADC3_EN
1
ADC2_EN
0
ADC1_EN
Settings
0
1
0
1
0
1
0
1
0
1
0
1
Description
LNA and PGA Enable Channel 2.
Disable the LNA/PGA Channel 2.
Enable the LNA/PGA Channel 2.
LNA and PGA Enable Channel 1.
Disable the LNA/PGA Channel 1.
Enable the LNA/PGA Channel 1.
ADC 4 Enable.
Disable ADC 4.
Enable ADC 4.
ADC 3 Enable.
Disable ADC 3.
Enable ADC 3.
ADC 2 Enable.
Disable ADC 2.
Enable ADC 2.
ADC 1 Enable.
Disable ADC 1.
Enable ADC 1.
POWER ENABLE REGISTER
Address: 0x042, Reset: 0x03FF, Name: POWER_ENABLE
Data Sheet
Reset
0x1
Access
RW
0x1
RW
0x1
RW
0x1
RW
0x1
RW
0x1
RW
Table 31. Bit Descriptions for POWER_ENABLE
Bits Bit Name
Settings Description
9
CLOCK_LOSS_EN
Enables Clock Loss.
0 Disables Clock Loss Detect.
1 Enables Clock Loss Detect.
7
FLASH_LDO_EN
Flash LDO Block Enable.
Rev. 0 | Page 40 of 72
Reset
0x1
Access
RW
0x1
RW