ADAR7251_15 Datasheet, PDF (12/72 Pages) Analog Devices – 4-Channel, 16-Bit, Continuous Time Data Acquisition ADC

ADAR7251
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AGND1 1
AIN3P 2
AIN3N 3
AIN4P 4
AIN4N 5
AUXIN1 6
AUXIN2 7
CM 8
AGND2 9
BIASN 10
BIASP 11
AVDD1 12
ADAR7251
TOP VIEW
(Not to Scale)
36 DGND3
35 CONV_START
34 SCLK_ADC
33 FS_ADC/ADC_DOUT7
32 ADDR15/ADC_DOUT6
31 ADC_DOUT5
30 ADC_DOUT4
29 ADC_DOUT3/GPIO2
28 ADC_DOUT2/GPIO1
27 ADC_DOUT1
26 ADC_DOUT0
25 IOVDD1
Data Sheet
NOTES
1. THE EXPOSED PAD ON THE BOTTOM OF THE PACKAGE MUST BE
SOLDERED TO THE GROUND PLANE ON THE BOARD FOR POWER DISSIPATION.
Figure 7. Pin Configuration
Table 9. Pin Function Descriptions
Pin No. Mnemonic
Type¹
EPAD
1
AGND1²
PWR
2
AIN3P
AIN
3
AIN3N
AIN
4
AIN4P
AIN
5
AIN4N
AIN
6
AUXIN1
AIN
7
AUXIN2
AIN
8
CM
AIO
9
AGND2²
10
BIASN
11
BIASP
12
AVDD1
13
PLLGND
14
PLLFILT
15
PLLVDD
PWR
AOUT
AOUT
PWR
PWR
AIN
PWR
16
XIN/MCLKIN
AIN
17
XOUT
AOUT
18
AVDD2
PWR
19
REGOUT_DIGITAL
PWR
20
DGND1³
PWR
Description
Exposed Pad. The exposed pad on the bottom of the package must be soldered to the ground plane
on the board for power dissipation.
Analog Ground. This pin is the ground reference point for all analog blocks in the ADAR7251.
Noninverting Input to Differential Analog Channel 3.
Inverting Input to Differential Analog Channel 3.
Noninverting Input to Differential Analog Channel 4.
Inverting Input to Differential Analog Channel 4.
Auxiliary ADC Analog Input 1. Single-ended analog input channel.
Auxiliary ADC Analog Input 2. Single-ended analog input channel.
ADC Reference Output. Connect a 10 μF capacitor in parallel with a 100 nF capacitor from this pin to
AGNDx.
Analog Ground. This pin is the ground reference point for all analog blocks in the ADAR7251.
Internal Bias Generator. Decouple to AGNDx using a 0.47 μF capacitor.
Internal Bias Generator. Decouple to AVDDx using a 0.47 μF capacitor.
Analog Supply Voltage, 3.3 V. Decouple this supply pin to AGNDx. See Figure 60.
Analog Ground for PLL. Connect to a ground plane directly on the board.
Filter Components Connection for PLL. See Figure 60.
Analog Supply for Analog PLL, 3.3 V. Decouple to the PLLGND pin (Pin13) using a 0.1 μF multilayer
ceramic capacitor (MLCC). Connect to AVDDx or an external 3.3 V source. It is recommended to add
the filter for a clean 3.3 V source and for good PLL performance.
Internal Oscillator Input/Clock Input. If using an external crystal, connect it between the XIN and
XOUT pins. If not using a crystal, a single-ended clock must be provided at the MCLKIN pin. The
ADAR7251 accepts a clock frequency range of 16 MHz to 54 MHz.
Internal Oscillator Output Connection for External Crystal.
Analog Supply Voltage, 3.3 V. Decouple this supply pin to AGNDx. See Figure 60.
LDO Regulator Output for Internal Digital Core (1.8 V, Typical). Decouple to DGNDx. See Figure 60. Connect
REGOUT_DIGITAL to the DVDDx pins if using the internal regulator to supplythe 1.8 V to the digital core.
Digital Ground. This pin is the ground reference point for the digital circuitry on the ADAR7251.
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