EVAL-ADF4108EBZ1 Datasheet, PDF (4/20 Pages) Analog Devices – PLL Frequency Synthesizer

ADF4108
Data Sheet
Parameter
NOISE CHARACTERISTICS
Normalized Phase Noise Floor
(PNSYNTH) ⁹
Normalized 1/f Noise (PN1_f)¹⁰
Phase Noise Performance¹¹
7900 MHz Output¹²
Spurious Signals
7900 MHz Output¹²
B Chips²
B Version¹ (Typ)
Unit
−223
−122
−223
−122
dBc/Hz typ
dBc/Hz typ
−81
−81
dBc/Hz typ
−82
−82
dBc typ
Test Conditions/Comments
PLL loop B/W = 500 kHz, measured at 100 kHz offset
10 kHz offset; normalized to 1 GHz
@ VCO output
@ 1 kHz offset and 1 MHz PFD frequency
@ 1 MHz offset and 1 MHz PFD frequency
1 _{Operating temperature range (B version) is −40°C to +85°C.}
2 _{The B chip specifications are given as typical values.}
3 _{This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the RF input is divided down to a frequency that}
is less than this value.
4 _{AVDD = DVDD = 3.3 V.}
5 _{AC coupling ensures AVDD/2 bias.}
6 _{Guaranteed by design. Sample tested to ensure compliance.}
7 _{TA = 25°C; AVDD = DVDD = 3.3 V; P = 32; RFIN = 8 GHz, fPFD = 200 kHz, REFIN = 10 MHz.}
8 _{TA = 25°C; AVDD = DVDD = 3.3 V; R = 16,383; A = 63; B = 891; P = 32; RFIN = 7.0 GHz.}
9 _{The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider}
value) and 10 log FPFD. PNSYNTH = PNTOT − 10 log FPFD − 20 log N.
10 _{The PLL phase noise is composed of 1/f (flicker) noise plus the normalized PLL noise floor. The formula for calculating the 1/f noise contribution at an RF frequency, fRF,}
and at a frequency offset, f, is given by PN = PN1_f + 10 log(10 kHz/f) + 20 log(fRF/1 GHz). All phase noise measurements were performed with the EVAL-ADF4108EBZ1
and the Agilent E5500 phase noise system. Both the normalized phase noise floor and flicker noise are modeled in ADIsimPLL.
11 _{The phase noise is measured with the EVAL-ADF4108EB1Z evaluation board, with the ZComm CRO8000Z VCO. The spectrum analyzer provides the REFIN for the}
synthesizer (fREFOUT = 10 MHz @ 0 dBm).
12 _{fREFIN = 10 MHz; fPFD = 1 MHz; fRF = 7900 MHz; N = 7900; loop B/W = 30 kHz, VCO = ZComm CRO8000Z.}
Rev. B | Page 4 of 20