ADSP-BF607BBCZ-5 Datasheet, PDF (35/112 Pages) Analog Devices – Blackfin Dual Core Embedded Processor

ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609
Table 12. Signal Multiplexing for Port E
Signal Name
PE_00
PE_01
PE_02
PE_03
PE_04
PE_05
PE_06
PE_07
PE_08
PE_09
PE_10
PE_11
PE_12
PE_13
PE_14
PE_15
Multiplexed Function 0
SPI1_D3
SPI1_D2
SPI1_RDY
SPT1_ATDV
SPT1_BTDV
PWM0_SYNC
ETH1_MDC
ETH1_MDIO
ETH1_CRS
ETH1_RXD1
Multiplexed Function 1
PPI0_D18
PPI0_D19
PPI0_D22
PPI0_D16
PPI0_D17
PPI0_D23
PPI0_FS3
PPI0_FS2
PPI0_FS1
PPI0_CLK
PWM1_DL
PWM1_DH
PWM1_CL
PWM1_CH
SPT2_ATDV
PWM1_BL
Multiplexed Function 2
SPT1_BD1
SPT1_BD0
SPT1_ACLK
ACM0_FS/SPT1_BFS
ACM0_CLK/SPT1_BCLK
SPT1_AFS
LP3_CLK
LP3_ACK
LP2_ACK
LP2_CLK
RSI0_D6
RSI0_D7
RSI0_D5
RSI0_D4
TM0_TMR0
RSI0_D3
Multiplexed Function
Input Tap
ACM0_T0
PWM0_TRIP0
Table 13. Signal Multiplexing for Port F
Signal Name
PF_00
PF_01
PF_02
PF_03
PF_04
PF_05
PF_06
PF_07
PF_08
PF_09
PF_10
PF_11
PF_12
PF_13
PF_14
PF_15
Multiplexed Function 0
PWM0_AL
PWM0_AH
PWM0_BL
PWM0_BH
PWM0_CL
PWM0_CH
PWM0_DL
PWM0_DH
SPI1_SEL5
SPI1_SEL6
ACM0_A4
ACM0_A2
ACM0_A3
ACM0_A0
ACM0_A1
Multiplexed Function 1
PPI0_D00
PPI0_D01
PPI0_D02
PPI0_D03
PPI0_D04
PPI0_D05
PPI0_D06
PPI0_D07
PPI0_D08
PPI0_D09
PPI0_D10
PPI0_D11
PPI0_D12
PPI0_D13
PPI0_D14
PPI0_D15
Multiplexed Function 2
LP2_D0
LP2_D1
LP2_D2
LP2_D3
LP2_D4
LP2_D5
LP2_D6
LP2_D7
LP3_D0
LP3_D1
LP3_D2
LP3_D3
LP3_D4
LP3_D5
LP3_D6
LP3_D7
Multiplexed Function
Input Tap
PWM0_TRIP1
Rev. 0 | Page 35 of 112 | June 2013