DAC8562 Datasheet, PDF (2/16 Pages) Analog Devices – +5 Volt, Parallel Input Complete 12-Bit DAC

DAC8562–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ V_DD = +5.0 ؎ 5%, R_S = No Load, –40؇C ≤ T_A ≤ +85؇C, unless otherwise noted)
Parameter
Symbol Condition
Min Typ Max Units
STATIC PERFORMANCE
Resolution
Relative Accuracy
Differential Nonlinearity
Zero-Scale Error
Full-Scale Voltage
Full-Scale Tempco
ANALOG OUTPUT
Output Current
Load Regulation at Half Scale
Capacitive Load
REFERENCE OUTPUT
Output Voltage
Output Source Current
Line Rejection
Load Regulation
LOGIC INPUTS
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Input Capacitance
INTERFACE TIMING SPECIFICATIONS^{1, 4}
Chip Enable Pulse Width
Data Setup
Data Hold
Clear Pulse Width
AC CHARACTERISTICS⁴
Voltage Output Settling Time⁶
Digital Feedthrough
N
INL
DNL
V_ZSE
V_FS
TCV_FS
I_OUT
LD_REG
C_L
V_REF
I_REF
LN_REJ
LD_REG
V_IL
V_IH
I_IL
C_IL
t_CEW
t_DS
t_DH
t_CLRW
t_S
Note 2
E Grade
F Grade
No Missing Codes
Data = 000_H
Data - FFF_H3
E Grade
F Grade
Notes 3, 4
12
–1/2
–1
–1
4.087
4.079
Data = 800_H
±5
R_L = 402 Ω to ∞, Data = 800_H
No Oscillation⁴
Note 5
I_REF = 0 to 5 mA
2.484
5
2.4
Note 4
30
30
10
20
To ± 1 LSB of Final Value
± 1/4 +1/2
± 3/4 +1
± 3/4 +1
+1/2 +3
4.095
4.095
± 16
4.103
4.111
±7
1
3
500
2.500
7
2.516
0.08
0.1
0.8
10
10
16
35
Bits
LSB
LSB
LSB
LSB
V
V
ppm/°C
mA
LSB
pF
V
mA
%/V
%/mA
V
V
µA
pF
ns
ns
ns
ns
µs
nV sec
SUPPLY CHARACTERISTICS
Positive Supply Current
Power Dissipation
Power Supply Sensitivity
I_DD
P_DISS
PSS
V_IH = 2.4 V, V_IL = 0.8 V
V_IL = 0 V, V_DD = +5 V
V_IH = 2.4 V, V_IL = 0.8 V
V_IL = 0 V, V_DD = +5V
∆V_DD = ± 5%
3
0.6
15
3
0.002
6
1
30
5
0.004
mA
mA
mW
mW
%/%
NOTES
1_{All input control signals are specified with tr = tf = 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.}
2_{1 LSB = 1 mV for 0 to +4.095 V output range.}
3_{Includes internal voltage reference error.}
4_{These parameters are guaranteed by design and not subject to production testing.}
5_{Very little sink current is available at the REFOUT pin. Use external buffer if setting up a virtual ground.}
6_{The settling time specification does not apply for negative going transitions within the last 6 LSBs of ground. Some devices exhibit double the typical settling time in}
this 6 LSB region.
Specifications subject to change without notice.
–2–
REV. A