DAC8562 Datasheet, PDF (11/16 Pages) Analog Devices – +5 Volt, Parallel Input Complete 12-Bit DAC

DAC8562
+5V
10µF
0.1µF
DATA
CE 16
CLR
15
20
V_DD
V_OUT 13
DAC-8562
REFOUT 14
DGND AGND
10
12
R5
10kΩ
R1
10kΩ
R2
12.7k
R6
–2.5V
10k Ω
6
A2 ⁷
5
R3
247k Ω
R4
23.7k Ω
FULL SCALE
ADJUST
P2
+5V ^500Ω
2
8
A1
1
3
4
–5V ≤ V_O ≤ +5V
P1
10k Ω
ZERO SCALE
ADJUST
–5V
A1, A2 = 1/2 OP-295
Figure 33. Bipolar Output Operation
Bipolar Output Operation
Although the DAC8562 has been designed for single supply op-
eration, bipolar operation is achievable using the circuit illus-
trated in Figure 33. The circuit uses a single supply, rail-to-rail
OP295 op amp and the DAC’s internal +2.5 V reference to gen-
erate the –2.5 V reference required to level-shift the DAC out-
put voltage. The circuit has been configured to provide an
output voltage in the range –5 V ≤ V_OUT ≤ +5 V and is coded in
complementary offset binary. Although each DAC LSB corre-
sponds to 1 mV, each output LSB has been scaled to 2.44 mV.
Table IV provides the relationship between the digital codes and
output voltage.
The transfer function of the circuit is given by:
V_O
=
−1 mV
× Digital
Code
×

R4
R1

+
2.5
×

R4
R2

and, for the circuit values shown, becomes:
V_O = –2.44 mV × Digital Code + 5 V
V_O
= 1 mV
× Digital
Code
×


R4
R3 + R4


×

¹
+
R2
R1 
– REFOUT
×


R2
R1


For the ± 2 5 V output range and the circuit values shown in the
table, the transfer equation becomes:
V_O = 1.22 mV × Digital Code – 2.5 V
Similarly, for the ± 5 V output range, the transfer equation be-
comes:
V_O = 2.44 mV × Digital Code – 5 V
Note that, for ± 5 V output voltage operation, R5 is required as a
pull-down for REFOUT. Or, REFOUT can be buffered by an
op amp configured as a follower that can source and sink cur-
rent.
Table IV. Bipolar Code Table
Hexadecimal Number Decimal Number Analog Output
in DAC Register
in DAC Register Voltage (V)
FFF
4095
–4 9976
801
2049
–2.44E–3
800
2048
0
7FF
2047
+2.44E–3
000
0
+5
To maintain monotonicity and accuracy, R1, R2, R4, R5, and
R6 should be selected to match within 0.01% and must all be of
the same (preferably metal foil) type to assure temperature coef-
ficient matching. Mismatching between R1 and R2 causes offset
and gain errors while an R4 to R1 and R2 mismatch yields gain
errors.
For applications that do not require high accuracy, the circuit il-
lustrated in Figure 34 can also be used to generate a bipolar
output voltage. In this circuit, only one op amp is used and no
potentiometers are used for offset and gain trim The output
voltage is coded in offset binary and is given by:
+5V
0.1µF
DATA
20
V_DD
REFOUT 14
DAC-8562
CE 16
CLR
15
V_OUT 13
DGND AGND
10
12
R1
R5
4.99k Ω
R3
R2
+5V
2
8
A1 1
V_O
3
4
–5V
R4
A1 = 1/2 OP-295
V_OUT
RANGE R1
±2.5V 10k
±5V
10k
R2 R3
10k 10k
20k 10k
R4
15.4k + 274
43.2k + 499
Figure 34. Bipolar Output Operation Without
Trim Version 1
REV. A
–11–