ADSP-21362 Datasheet, PDF (16/52 Pages) Analog Devices – SHARC Processor

ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
ADSP-2136x SPECIFICATIONS
OPERATING CONDITIONS
K Grade
B Grade
Parameter¹
Description
Min Max
Min Max
Unit
V_DDINT
Internal (Core) Supply Voltage
1.14 1.26
1.14 1.26
V
A_VDD
Analog (PLL) Supply Voltage
1.14 1.26
1.14 1.26
V
V_DDEXT
V_IH²
V_IL²
V_{IH_CLKIN}³
External (I/O) Supply Voltage
High Level Input Voltage @ V_DDEXT = max
Low Level Input Voltage @ V_DDEXT = min
High Level Input Voltage @ V_DDEXT = max
3.13 3.47
3.13 3.47
V
2.0
V_DDEXT + 0.5
2.0
V_DDEXT + 0.5
V
–0.5 +0.8
–0.5 +0.8
V
1.74 V_DDEXT + 0.5
1.74 V_DDEXT + 0.5
V
V_{IL_CLKIN}
T_AMB^{4, 5}
Low Level Input Voltage @ V_DDEXT = min
Ambient Operating Temperature
–0.5 +1.19
–0.5 +1.19
V
0
+70
–40 +85
°C
1 _{Specifications subject to change without notice.}
2 _{Applies to input and bidirectional pins: AD15–0, FLAG3–0, DAI_Px, SPICLK, MOSI, MISO, SPIDS, BOOTCFGx, CLKCFGx, RESET, TCK, TMS, TDI, TRST.}
3 _{Applies to input pin CLKIN.}
4 _{See Thermal Characteristics on Page 47 for information on thermal specifications.}
5 _{See Engineer-to-Engineer Note (No. EE-277) for further information.}
ELECTRICAL CHARACTERISTICS
Parameter¹
Description
Test Conditions
Min
V_OH²
High Level Output Voltage
@ V_DDEXT = min, I_OH = –1.0 mA³
2.4
V_OL²
Low Level Output Voltage
@ V_DDEXT = min, I_OL = 1.0 mA³
I_IH^{4, 5}
High Level Input Current
@ V_DDEXT = max, V_IN = V_DDEXT max
I_IL⁴
Low Level Input Current
@ V_DDEXT = max, V_IN = 0 V
I_ILPU⁵
Low Level Input Current Pull-Up
@ V_DDEXT = max, V_IN = 0 V
I_OZH^{6, 7}
Three-State Leakage Current
@ V_DDEXT= max, V_IN = V_DDEXT max
I_OZL⁶
Three-State Leakage Current
@ V_DDEXT = max, V_IN = 0 V
I_OZLPU⁷
Three-State Leakage Current Pull-Up
@ V_DDEXT = max, V_IN = 0 V
I_DD-INTYP^{8, 9}
Supply Current (Internal)
t_CCLK = min, V_DDINT = nom
AI_DD¹⁰
Supply Current (Analog)
A_VDD = max
C_IN^{11, 12}
Input Capacitance
f_IN = 1 MHz, T_CASE = 25°C, V_IN = 1.2 V
1 _{Specifications subject to change without notice.}
2 _{Applies to output and bidirectional pins: AD15–0, RD, WR, ALE, FLAG3–0, DAI_Px, SPICLK, MOSI, MISO, EMU, TDO, CLKOUT, XTAL.}
3 _{See Output Drive Currents on Page 46 for typical drive current capabilities.}
4 _{Applies to input pins: SPIDS, BOOTCFGx, CLKCFGx, TCK, RESET, CLKIN.}
5 _{Applies to input pins with 22.5 kΩ internal pull-ups: TRST, TMS, TDI.}
6 _{Applies to three-stateable pins: FLAG3–0.}
7 _{Applies to three-stateable pins with 22.5 kΩ pull-ups: AD15–0, DAI_Px, SPICLK, EMU, MISO, MOSI.}
8 _{Typical internal current data reflects nominal operating conditions.}
9 _{See Engineer-to-Engineer Note (No. EE-277) for further information.}
10_{Characterized, but not tested.}
11_{Applies to all signal pins.}
12_{Guaranteed, but not tested.}
Max
0.4
10
10
200
10
10
200
800
10
4.7
Unit
V
V
μA
μA
μA
μA
μA
μA
mA
mA
pF
Rev. A | Page 16 of 52 | December 2006