5962-88766013A Datasheet, PDF (16/16 Pages) Analog Devices – LC2MOS 12-Bit DACPORTs

AD7245A/AD7248A
MECHANICAL INFORMATION —AD7248A
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
20-Lead Plastic DIP
(N-20)
1.07 (27.18) MAX
20
11 0.255 (6.477)
1
10 0.245 (6.223)
PIN 1
0.125
(3.175)
MIN
0.021 (0.533)
0.015 (0.381)
0.021 (0.533) 0.070 (1.77)
0.015 (0.381) 0.045 (1.15)
0.32 (8.128)
0.29 (7.366)
0.145
(3.683)
MIN
0.18 (4.57)
0.125 (3.18)
0.011 (0.28)
15؇
0.009 (0.23)
0
LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH.
LEADS ARE SOLDER OR TIN-PLATED KOVAR OR ALLOY 42
20-Lead Cerdip
(Q-20)
0.11 (2.79)
0.09 (2.28)
20
11 _{0.310 (7.87)}
0.220 (5.59)
1
10
PIN 1
0.20 (5.0)
0.14 (3.18)
0.15 (3.8)
0.125 (3.18)
0.97 (24.64)
0.935 (23.75)
0.060 (1.52)
0.015 (0.38)
0.02 (0.5)
0.016 (0.41)
0.070 (1.78)
0.030 (0.76)
0.150
(3.81)
MIN
SEATING
PLANE
0.320 (8.13)
0.290 (7.37)
0.015 (0.38)
15° _{0.008 (0.20)}
0°
LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH.
LEADS ARE SOLDER OR TIN-PLATED KOVAR OR ALLOY 42
20-Lead SOIC
(R-20)
0.5118 (13.00)
0.4961 (12.60)
20
11
0.299 (7.60)
0.291 (7.40)
0.419 (10.65)
1
10
0.404 (10.00)
PIN 1
0.0500
(1.27)
BSC
0.107 (2.72)
0.089 (2.26)
0.011 (0.275)
0.005 (0.125)
0.022 (0.56)
0.014 (0.36)
8؇
SEATING
PLANE
0.015 (0.38)
0؇
0.007 (0.18)
0.034 (0.86)
0.018 (0.46)
20-Terminal
Plastic Leaded Chip Carrier
(P-20A)
0.045 ؎ 0.003
(1.143 ؎ 0.076)
0.020
(0.51)
MAX
0.105
(2.665
؎
؎
0.015
0.375)
SQ
0.173 ؎ 0.008
(4.385 ؎ 0.185)
0.020
(0.51) MIN
3
19
4
PIN 1 18
IDENTIFIER
TOP VIEW
(PINS DOWN)
8
14
9
13
0.050
(1.27)
BSC
0.017 ؎ 0.004
(0.432 ؎ 0.101)
0.029 ؎ 0.003
(0.737 ؎ 0.076)
0.390
(9.905
؎
؎
0.005
0.125)
SQ
0.025
(0.64) MIN
0.105 ؎ 0.015
(2.665 ؎ 0.375)
Revision History
Location
Page
Data Sheet changed from REV. A to REV. B.
Changed V_DD = 15 V ± 5% to V_DD = 15 V ± 10% in Static Performance section in Test Conditions/Comments column . . . . . . . . 2
Changed A Version of Full-Scale Temperature Coefficient from ± 30 to ± 40 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Changed B and T Versions of V_DD Power Requirements from +11.4/+15.75 to +10.8/+16.5 for V min.
Changed B and T Versions of V_SS Power Requirements from –11.4/–15.75 to –10.8/–16.5 for V max . . . . . . . . . . . . . . . . . . . . . 2
Change to Note 1 and Note 9 of Specifications table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Change to Note 2 in Switching Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Changes to R-24 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
–16–
REV. B