ADSP-BF700 Datasheet, PDF (15/116 Pages) Analog Devices – Instruction set compatible with previous Blackfin products

ADSP-BF700/701/702/703/704/705/706/707
Target defined:
• Hardware Reset—All functional units are set to their
default states without exception. History is lost.
• System Reset—All functional units except the RCU are set
to their default states.
• Core-only Reset—Affects the core only. The system soft-
ware should guarantee that the core, while in reset state, is
not accessed by any bus master.
Source defined:
• Hardware Reset—The SYS_HWRST input signal is
asserted active (pulled down).
• System Reset—May be triggered by software (writing to the
RCU_CTL register) or by another functional unit such as
the dynamic power management (DPM) unit (hibernate)
or any of the system event controller (SEC), trigger routing
unit (TRU), or emulator inputs.
• Core-only Reset—Triggered by software.
• Trigger request (peripheral).
Voltage Regulation
The processor requires an external voltage regulator to power
the VDD_INT pins. To reduce standby power consumption, the
external voltage regulator can be signaled through 
SYS_EXTWAKE to remove power from the processor core.
This signal is high-true for power-up and may be connected
directly to the low-true shut-down input of many common
regulators.
While in the hibernate state, all external supply pins (VDD_
EXT, VDD_USB, and VDD_DMC) can still be powered, elimi-
nating the need for external buffers. The external voltage
regulator can be activated from this power down state by assert-
ing the SYS_HWRST pin, which then initiates a boot sequence.
SYS_EXTWAKE indicates a wake-up to the external voltage
regulator.
SYSTEM DEBUG
The processor includes various features that allow for easy sys-
tem debug. These are described in the following sections.
System Watchpoint Unit
The system watchpoint unit (SWU) is a single module which
connects to a single system bus and provides for transaction
monitoring. One SWU is attached to the bus going to each
system slave. The SWU provides ports for all system bus address
channel signals. Each SWU contains four match groups of regis-
ters with associated hardware. These four SWU match groups
operate independently, but share common event (interrupt,
trigger, and others) outputs.
Debug Access Port
The debug access port (DAP) provides IEEE-1149.1 JTAG
interface support through its JTAG debug and serial wire debug
port (SWJ-DP). SWJ-DP is a combined JTAG-DP and SW-DP
that enables either serial wire debug (SWD) or a JTAG emulator
to be connected to a target. SWD signals share the same pins as
JTAG. The DAP provides an optional instrumentation trace for
both the core and system. It provides a trace stream that con-
forms to MIPI System Trace Protocol version 2 (STPv2).
DEVELOPMENT TOOLS
Analog Devices supports its processors with a complete line of
software and hardware development tools, including integrated
development environments (CrossCore^® Embedded Studio),
evaluation products, emulators, and a wide variety of software
add-ins.
Integrated Development Environments (IDEs)
CrossCore Embedded Studio is based on the Eclipse^TM frame-
work. Supporting most Analog Devices processor families, it is
the IDE of choice for future processors, including multicore
devices. CrossCore Embedded Studio seamlessly integrates
available software add-ins to support real time operating sys-
tems, file systems, TCP/IP stacks, USB stacks, algorithmic
software modules, and evaluation hardware board support
packages. For more information, visit www.analog.com/cces.
EZ-KIT Lite Evaluation Board
For processor evaluation, Analog Devices provides a wide range
of EZ-KIT Lite^® evaluation boards. Including the processor and
key peripherals, the evaluation board also supports on-chip
emulation capabilities and other evaluation and development
features. Also available are various EZ-Extenders^®, which are
daughter cards delivering additional specialized functionality,
including audio and video processing. For more information,
visit www.analog.com and search on “ezkit” or “ezextender”.
EZ-KIT Lite Evaluation Kits
For a cost-effective way to learn more about developing with
Analog Devices processors, Analog Devices offer a range of EZ-
KIT Lite evaluation kits. Each evaluation kit includes an EZ-KIT
Lite evaluation board, directions for downloading an evaluation
version of the available IDE, a USB cable, and a power supply.
The USB controller on the EZ-KIT Lite board connects to the
USB port of the user’s PC, enabling the chosen IDE evaluation
suite to emulate the on-board processor in-circuit. This permits
the customer to download, execute, and debug programs for the
EZ-KIT Lite system. It also supports in-circuit programming of
the on-board Flash device to store user-specific boot code,
enabling standalone operation. With the full version of Cross-
Core Embedded Studio installed (sold separately), engineers can
develop software for supported EZ-KITs or any custom system
utilizing supported Analog Devices processors.
ADSP-BF706 EZ-KIT Mini
The ADSP-BF706 EZ-KIT Mini^TM product (ADZS-BF706-
EZMini) contains the ADSP-BF706 processor and is shipped
with all of the necessary hardware. Users can start their evalua-
tion immediately. The EZ-KIT Mini product includes the
standalone evaluation board and USB cable. The EZ-KIT Mini
ships with an on-board debug agent.
The evaluation board is designed to be used in conjunction with
the CrossCore Embedded Studio (CCES) development tools to
test capabilities of the ADSP-BF706 Blackfin processor.
Rev. A | Page 15 of 116 | September 2015