AD9957_07 Datasheet, PDF (1/60 Pages) Analog Devices – 1 GSPS Quadrature Digital Upconverter with 18-Bit IQ Data Path and 14-Bit DAC

1 GSPS Quadrature Digital Upconverter
with 18-Bit IQ Data Path and 14-Bit DAC
AD9957
FEATURES
1 GSPS internal clock speed (up to 400 MHz analog output)
Integrated 1 GSPS 14-bit DAC
250 MHz I/Q data throughput rate
Phase noise ≤ −125 dBc/Hz (400 MHz carrier @ 1 kHz offset)
Excellent dynamic performance >80 dB narrow-band SFDR
8 programmable profiles for shift keying
SIN(x)/(x) correction (inverse sinc filter)
Reference clock multiplier
Internal oscillator for a single crystal operation
Software and hardware controlled power-down
Integrated RAM
Phase modulation capability
Multichip synchronization
Easy interface to Blackfin SPORT
Interpolation factors from 4× to 252×
Interpolation DAC mode
Gain control DAC
Internal divider allows references up to 2 GHz
1.8 V and 3.3 V power supplies
100-lead TQFP_EP package
APPLICATIONS
HFC data, telephony, and video modems
Wireless base station transmission
Broadband communications transmissions
Internet telephony
GENERAL DESCRIPTION
The AD9957 functions as a universal I/Q modulator and agile
upconverter for communications systems where cost, size, power
consumption, and dynamic performance are critical. The AD9957
integrates a high speed, direct digital synthesizer (DDS), a high
performance, high speed, 14-bit digital-to-analog converter (DAC),
clock multiplier circuitry, digital filters, and other DSP functions
onto a single chip. It provides for baseband upconversion for data
transmission in a wired or wireless communications system.
The AD9957 is the third offering in a family of quadrature
digital upconverters (QDUCs) that includes the AD9857 and
AD9856. It offers performance gains in operating speed, power
consumption, and spectral performance. Unlike its predecessors,
it supports a 16-bit serial input mode for I/Q baseband data.
The device can alternatively be programmed to operate either as
a single tone, sinusoidal source or as an interpolating DAC.
The reference clock input circuitry includes a crystal oscillator,
a high speed, divide-by-two input, and a low noise PLL for
multiplication of the reference clock frequency.
The user interface to the control functions includes a serial port
easily configured to interface to the SPORT of the Blackfin®
DSP and profile pins to enable fast and easy shift keying of any
signal parameter (phase, frequency, and amplitude).
I/Q DATA
FUNCTIONAL BLOCK DIAGRAM
I
FORMAT AND
INTERPOLATE
Q
14-BIT DAC
NCO
AD9957
DATA
FOR
XMIT
TIMING
AND
CONTROL
REFERENCE CLOCK
INPUT CIRCUITRY
USER INTERFACE
REFERENCE CLOCK INPUT
Figure 1.
Rev. 0
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