PAC5253_17 Datasheet, PDF (12/71 Pages) Active-Semi, Inc – Power Application Controller

7. ARCHITECTURAL BLOCK DIAGRAM
Figure 7-1. Architectural Block Diagram
SWDIO, SWDCL
PAC5253
Power Application Controller
32kB/16kB
FLASH
8kB/4kB
SRAM
DEBUG
ARM
CORTEX-M0
CORE
PWMAx, PWMBx
PCx, PDx, PEx
SPICSx, SPIMISO,
SPIMOSI, SPICLK
I2CSDA, I2CSCL
UARTRX, UARTTX
nRESET1
CLOCK
CONTROL
RTC
GPIO (10)
SPI
I²C
UART
SYSTEM
CONTROL
PWM ENGINE
TIMERS (4)
PWM /
CC (14)
DEAD TIME
(7)
BRIDGE
WATCHDOG
DATA ACQUISITION &
SEQUENCER
10-BIT
ADC
AUTO
SAMPLING
- 12 -
PAC5253
Power Application Controller
MULTI-MODE POWER
MANAGER
MULTI-
MODE
SWITCHING
SUPPLY
LINEAR
REGU-
LATORS
(4)
VHM
DRM
VP
CSM
VSS
REGO
VSYS
VCCIO
VCC33
VCC18
APPLICATION SPECIFIC
POWER DRIVERS
HSGD (3)
DXBx
DXHx
DXSx
LSGD (4)
DRLx
CONFIGURABLE
ANALOG FRONT END
PGA/
CMP (4)
AMPx/CMPx/PHCx
DAC (2)
DIFF-PGA/
PCMP (3)
AIO
CONTROL
(10)
DAxP/PCMPx
DAxN
ADx
AIOx
BUF6
PBTN
Rev 1.18‒December 29, 2016