A3P1000-1FGG144M Datasheet, PDF (52/181 Pages) Actel Corporation – Military ProASIC3/EL Low-Power Flash FPGAs

Military ProASIC3/EL Low-Power Flash FPGAs
Single-Ended I/O Characteristics
3.3 V LVTTL / 3.3 V LVCMOS
Low-Voltage Transistor–Transistor Logic (LVTTL) is a general-purpose standard (EIA/JESD) for 3.3 V
applications. It uses an LVTTL input buffer and push-pull output buffer.
Table 2-44 • Minimum and Maximum DC Input and Output Levels
Applicable to Pro I/Os for A3PE600L and A3PE3000L Only
3.3 V LVTTL /
3.3 V LVCMOS
Drive Strength
V_IL
V_IH
V_OL
V_OH I_OL I_OH
I_OSL
I_OSH
I_IL I_IH
Min., V Max., V Min., V Max., V Max., V Min., V mA mA Max., mA¹ Max., mA¹ µA² µA²
4 mA
–0.3 0.8
2
3.6
0.4
2.4 4 4
25
27
15 15
8 mA
–0.3 0.8
2
3.6
0.4
2.4 8 8
51
54
15 15
12 mA
–0.3 0.8
2
3.6
0.4
2.4 12 12 103
109 15 15
16 mA
–0.3 0.8
2
3.6
0.4
2.4 16 16 132
127 15 15
24 mA
–0.3 0.8
2
3.6
0.4
2.4 24 24 268
181 15 15
Notes:
1. Currents are measured at 100°C junction temperature and maximum voltage.
2. Currents are measured at 125°C junction temperature.
3. Software default selection highlighted in gray.
Table 2-45 • Minimum and Maximum DC Input and Output Levels
Applicable to Advanced I/O Banks for A3P1000 Only
3.3 V LVTTL /
3.3 V LVCMOS
Drive Strength
V_IL
V_IH
V_OL
V_OH I_OL I_OH
I_OSL
I_OSH
I_IL I_IH
Min., V Max., V Min., V Max., V Max., V Min., V mA mA Max., mA¹ Max., mA¹ µA² µA²
2 mA
–0.3 0.8
2
3.6
0.4
2.4 2 2
25
27
15 15
4 mA
–0.3 0.8
2
3.6
0.4
2.4 4 4
25
27
15 15
6 mA
–0.3 0.8
2
3.6
0.4
2.4 6 6
51
54
15 15
8 mA
–0.3 0.8
2
3.6
0.4
2.4 8 8
51
54
15 15
12 mA
–0.3 0.8
2
3.6
0.4
2.4 12 12 103
109 15 15
16 mA
–0.3 0.8
2
3.6
0.4
2.4 16 16 132
127 15 15
24 mA
–0.3 0.8
2
3.6
0.4
2.4 24 24 268
181 15 15
Notes:
1. Currents are measured at 100°C junction temperature and maximum voltage.
2. Currents are measured at 125°C junction temperature.
3. Software default selection highlighted in gray.
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