ACE25C512 Datasheet, PDF (9/34 Pages) ACE Technology Co., LTD. – 512K-BIT Serial Flash Memory

ACE25C512
512K-BIT Serial Flash Memory
Status Register Memory Protection
Status Register Content
Memory Content
TB bit BP2 bit BP1 bit BP0 bit
Address
Density
X
X
0
0
None
None
0
X
0
1
008000h~00FFFFh 32KB
1
X
0
1
000000h~007FFFh 32KB
X
X
1
X
000000h~00FFFFh 64KB
Table 2 Status Register Memory Protection
Portion
None
Upper 1/2
Lower 1/2
All
Instructions
The Standard/Dual SPI instruction set of the ACE25C512 consists of 17 basic instructions that are
fully controlled through the SPI bus (see Table 4~Table 5 Instruction Set). Instructions are initiated
with the falling edge of Chip Select (CS#). The first byte of data clocked into the DI input provides the
instruction code. Data on the DI input is sampled on the rising edge of clock with most significant bit
(MSB) first.
Instructions vary in length from a single byte to several bytes and may be followed by address bytes,
data bytes, dummy bytes (don’t care), and in some cases, a combination. Instructions are completed
with the rising edge of edge CS#. Clock relative timing diagrams for each instruction are included in
Figure 5 through Figure 29. All read instructions can be completed after any clocked bit. However, all
instructions that Write, Program or Erase must complete on a byte boundary (CS# driven high after a
full 8-bits have been clocked) otherwise the instruction will be ignored. This feature further protects
the device from inadvertent writes. Additionally, while the memory is being programmed or erased, or
when the Status Register is being written, all instructions except for Read Status Register will be
ignored until the program or erase cycle has completed.
Manufacturer and Device Identification
OP Code
MF7-MF0
ID15-ID0
ID7-DO
ABh
x
x
05h
90h
A1h
x
05h
9Fh
A1h
3110h
x
Table 3 Manufacturer and Device Identification
Standard SPI Instructions Set⁽¹⁾
Instruction Name Byte 1
Clock number
(0-7)
Write enable
06h
Write disable
04h
Read status register 05h
Write status Register 01h
Page program
02h
Sector erase (4KB) 20h
Byte 2
(8-15)
(S7-S0)⁽²⁾
(S7-S0)
A23-A16
A23-A16
Byte 3
(16-23)
Byte 4
(24-31)
(S15-S8)
A15-A8
A15-A8
A7-A0
A7-A0
Byte 5
(32-39)
D7-D0
Byte 6
(40-47)
D7-D0⁽³⁾
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