ACE25AC400GL Datasheet, PDF (7/23 Pages) ACE Technology Co., LTD. – SPI NOR FLASH

ID Definitions
Operation Code
9FH
90H
M7-M0
0E
0E
ACE25AC400GL
SPI NOR FLASH
ID15-ID8
60
ID7-ID0
13
12
Write Enable (WREN) (06H)
The Write Enable (WREN) command is for setting the Write Enable Latch (WEL) bit. The Write Enable
Latch (WEL) bit must be set prior to every Page Program (PP), Sector Erase (SE), Block Erase (BE), and
Chip Erase (CE) and Write Status Register (WRSR) command. The Write Enable (WREN) command
sequence: CS# goes low→Send Write Enable command→CS# goes high.
Figure1. Write Enable Sequence Diagram
Write Disable (WRDI) (04H)
The Write Disable command is for resetting the Write Enable Latch (WEL) bit. The Write Disable
command sequence: CS# goes low Send Write Disable command CS# goes high. The WEL bit is reset by
following condition: Power-up and upon completion of the Write Status Register, Page Program, Sector
Erase, Block Erase and Chip Erase commands.
Figure2. Write Disable Sequence Diagram
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