ACE25AC400GL Datasheet, PDF (6/23 Pages) ACE Technology Co., LTD. – SPI NOR FLASH

ACE25AC400GL
SPI NOR FLASH
Commands Description
All commands, addresses and data are shifted in and out of the device, beginning with the most
significant bit on the first rising edge of SCLK after CS# is driven low. Then, the one-byte command code
must be shifted in to the device, most significant bit first on SI, each bit being latched on the rising edges
of SCLK. See Table2, every command sequence starts with a one-byte command code. Depending on
the command, this might be followed by address bytes, or by data bytes, or by both or none. CS# must be
driven high after the last bit of the command sequence has been shifted in. For the command of Read,
Fast Read, Read Status Register, and Read Device ID, the shifted-in command sequence is followed by a
data-out sequence. CS# can be driven high after any bit of the data-out sequence is being shifted out.
For the command of Page Program, Sector Erase, Block Erase, Chip Erase, Write Status Register, Write
Enable, Write Disable, CS# must be driven high exactly at a byte boundary, otherwise the command is
rejected. That is CS# must driven high when the number of clock pulses after CS# being driven low is an
exact multiple of eight. For Page Program, if at any time the input byte is not a full byte, nothing will
happen and WEL will not be reset.
Table2. Commands
Command Name
Byte1
Byte2
Byte3
Byte4
Byte5
Byte6
n-Bytes
Write Enable
06H
Write Disable
04H
Read Status Register 05H
(S7-S0)
(continuous)
Write Status Register 01H
(S7-S0)
(continuous)
Read Data
03H
A23-A16
A15-A8
A7-A0
(D7-D0) (Next byte) (continuous)
Fast Read
0BH
A23-A16
A15-A8
A7-A0
dummy
(D7-D0) (continuous)
Page Program
02H
A23-A16
A15-A8
A7-A0
(D7-D0) (Next byte)
Sector Erase
20H
A23-A16
A15-A8
A7-A0
Block Erase
D8H
A23-A16
A15-A8
A7-A0
Chip Erase
C7/60H
Manufacturer/Device
90H
ID
dummy
dummy
00H (MID7-MID0) (DID7-DID0) (continuous)
Read Identification
(JDID15-JDI (JDID7-JDID
9FH (MID7-MID0)
D8)
0)
(continuous)
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