ACE25Q200G Datasheet, PDF (10/46 Pages) ACE Technology Co., LTD. – 2M BIT SPI NOR FLASH Memory Series

Table 4 Status Register-1 (SR1)
ACE25Q200G
2M BIT SPI NOR FLASH Memory Series
BIT Name
Function
7 SRP0 Status Resister Protect 0
6 SEC
5 TB
4 BP2
3 BP1
2 BP0
1 WEL
Sector/Block Protect
Top/Bottom Protect
Block Protect Bits
Write Enable Latch
0 WIP _{Write in Progress Status}
Default Value
Description
0 = /WP input has no effect or Power Supply Lock
0
Down mode
1 = /WP input can protect the Status Register or
OTP Lock Down
0 = BP2-BP0 protect 64KB blocks
0
1 = BP2-BP0 protect 4KB sectors
0 = BP2-BP0 protect from the Top down
0
1 = BP2-BP0 protect from the Bottom up
0
0
000b = No protection
See Table 6 and Table 7 for protection ranges
0
0 = Not Write Enabled, no embedded operation
0
can start
1 = Write Enabled, embedded operation can start
0
0 = Not Busy, no embedded operation in progress
1 = Busy, embedded operation in progress
The Status and Control Bits
WIP bit
The Write in Progress (WIP) bit indicates whether the memory is busy in program/erase/write status
register progress. When WIP bit sets to 1, means the device is busy in program/erase/write status
register progress, when WIP bit sets 0, means the device is not in program/erase/write status register
progress.
WEL bit
The Write Enable Latch bit indicates the status of the internal Write Enable Latch. When set to 1 the
internal Write Enable Latch is set, when set to 0 the internal Write Enable Latch is reset and no Write
Status Register, Program or Erase instruction is accepted.
SEC, TB, BP2, BP1, BP0 bits
The Block Protect (SEC, TB, BP2, BP1, BP0) bits are non-volatile. They define the size of the area
to be software protected against Program and Erase instructions. These bits are written with the Write
Status Register instruction. When the Block Protect (SEC, TB, BP2 , BP1 ,BP0) bits are set to 1, the
relevant memory area (as defined in Table 6).becomes protected against Page Program, Sector
Erase and Block Erase instructions. The Block Protect (SEC, TB, BP2, BP1, BP0) bits can be written
provided that the Hardware Protected mode has not been set.
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