IS66WV51216ALL Datasheet, PDF (9/16 Pages) Integrated Silicon Solution, Inc – 8Mb LOW VOLTAGE, ULTRA LOW POWER PSEUDO CMOS STATIC RAM

IS66WV51216ALL
IS66WV51216BLL
AC WAVEFORMS
READ CYCLE NO. 2^(1,3) (CS1, CS2, OE, AND UB/LB Controlled)
ADDRESS
OE
CS1
CS2
LB, UB
DOUT
tRC
tAA
tDOE
tLZOE
tACE1/tACE2
tLZCE1/
tLZCE2
tBA
tLZB
HIGH-Z
tOHA
tHZOE
tHZCS1/
tHZCS1
tHZB
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CS1, UB, or LB = Vil. CS2=WE=Vih.
3. Address is valid prior to or coincident with CS1 LOW transition.
Integrated Silicon Solution, Inc. — www.issi.com
9
Rev.  A
12/02/09