S1M8660A Datasheet, PDF (4/32 Pages) Samsung semiconductor – RX IF / BBA WITH GPS

S1M8660A (Preliminary)
RX IF/BBA WITH GPS
PIN DESCRIPTION
Pin No
1
Symbol
FMCLK
I/O
SEN
2
FMSTB
DI
7 RAGC_CONT
AI
9
F/GRX_IF1
AI
10
F/GRX_IF2
11
CRX_IF1
AI
12
CRX_IF2
21
RXVCO_T1
AI
22
RXVCO_T2
25 RXVCO_OUT
AO
26
SEN
D
27
Q_OFS
AI
28
I_OFS
29
SLOTB
DI
30
IDLEB/STB
DI
31
FMB/DATA
BI
Description
FM ADC clock input ,received from the modem.
Signal frequency is 360kHz; if unconnected, it becomes LOW.
FM STROBE input. Signal that controls the FM ADC initialization and
A-D conversion start. CLOCK frequency is 40kHz, which is received
from the MODEM; if unconnected, it remains at LOW.
AGC gain control input. The input voltage is allowed up to VDDA.
It remains at High impedance during SLEEP.
FM/GPS IF input terminals, which have an input impedance of about
865Ω; generally, the FM IF SAW filter is connected to them. Usually,
the IF SAW output is single-ended.
When these terminals are not used, they remain at High impedance.
CDMA IF input terminals, which have an input impedance of about
865Ω; generally, the CDMA IF SAW filter is connected to them.
Usually, the IF SAW output is differential. When these terminals are
not used, they remain at High impedance.
Very sensitive terminal, which is connected to the oscillation L-C
resonance circuit.
Their impedance are about 2kΩ
Output for the PLL, able to output about -12dBm.
When this is not used, it remains at high impedance.
Input that permits/not permits SPI BUS control.
If the input is high, SPI control is allowed, and its related 3-pins, STB,
DATA, and CLK, perform their functions; if Low, related 3-pins,
IDLEB, FMB, and SLEEPB, are allowed to perform parallel control.
When this is not used, it remains at Low.
Control DC input for removing the DC offset generated in the
S1M8660A and system during CDMA and AMPS Mode. The control
DC is generated in the modem in PDM form, passes through the R-C
filter and is converted to DC, which is sent to this input terminal.
This pin becomes Low during CDMA SLEEP Mode or FM RX Mode,
the system is assumed to be in the Rx SLOT mode, and all functions
are stopped except for the VCO, VCO buffer and TCXO/N. No
external clock inputs are not required in this product with this function.
When SEN is high, this pin becomes the STROBE input with the
permit of the 3-LINE Serial control input.
When SEN is low, parallel control input is allowed and this pin
executes the IDLEB function. If this pin is opened, it remains at Low.
When SEN is high, this pin inputs and outputs data with the permit of
the 3-line serial control input. When SEN is low, parallel control input
is allowed and this pin performs IDLEB. If this pin is opened, it
remains at Low.
4